From bd49a690194704510c552af4cb32a3435886a5ca Mon Sep 17 00:00:00 2001 From: Karthik Kantamneni Date: Wed, 26 May 2021 10:16:01 +0530 Subject: [PATCH] qcacmn: Introduce intermediate EP voting access state Introduce intermediate EP voting state during this transition state access the votes only if direct writes are not possible. Change-Id: Ib4522aef2209b4797100ca84e4e230a00e14b654 CRs-Fixed: 2954903 --- hal/wifi3.0/hal_srng.c | 11 ++++++++--- hif/inc/hif.h | 2 ++ 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/hal/wifi3.0/hal_srng.c b/hal/wifi3.0/hal_srng.c index ef79f33028..35238e5775 100644 --- a/hal/wifi3.0/hal_srng.c +++ b/hal/wifi3.0/hal_srng.c @@ -1283,13 +1283,18 @@ void hal_delayed_reg_write(struct hal_soc *hal_soc, void __iomem *addr, uint32_t value) { + uint8_t vote_access; + switch (srng->ring_type) { case CE_SRC: case CE_DST: case CE_DST_STATUS: - if (hif_get_ep_vote_access(hal_soc->hif_handle, - HIF_EP_VOTE_NONDP_ACCESS) == - HIF_EP_VOTE_ACCESS_DISABLE) { + vote_access = hif_get_ep_vote_access(hal_soc->hif_handle, + HIF_EP_VOTE_NONDP_ACCESS); + if ((vote_access == HIF_EP_VOTE_ACCESS_DISABLE) || + (vote_access == HIF_EP_VOTE_INTERMEDIATE_ACCESS && + PLD_MHI_STATE_L0 == + pld_get_mhi_state(hal_soc->qdf_dev->dev))) { hal_write_address_32_mb(hal_soc, addr, value, false); qdf_atomic_inc(&hal_soc->stats.wstats.direct); srng->wstats.direct++; diff --git a/hif/inc/hif.h b/hif/inc/hif.h index 1be6704830..8a04fdd166 100644 --- a/hif/inc/hif.h +++ b/hif/inc/hif.h @@ -1081,10 +1081,12 @@ enum hif_ep_vote_type { /** * enum hif_ep_vote_access - hif ep vote access * HIF_EP_VOTE_ACCESS_ENABLE: Enable ep voting + * HIF_EP_VOTE_INTERMEDIATE_ACCESS: allow during transistion * HIF_EP_VOTE_ACCESS_DISABLE: disable ep voting */ enum hif_ep_vote_access { HIF_EP_VOTE_ACCESS_ENABLE, + HIF_EP_VOTE_INTERMEDIATE_ACCESS, HIF_EP_VOTE_ACCESS_DISABLE };