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qcacmn: QDF changes to support IPA offload

QDF changes to support IPA offload.

Change-Id: Ib3a0f667bb9c11fb65f6a41ad777ff7273288569
Himanshu Batra %!s(int64=3) %!d(string=hai) anos
pai
achega
bd23cf7dcc

+ 8 - 0
qdf/Kbuild

@@ -27,6 +27,10 @@ INCS += -I$(obj)/$(HOST_CMN_CONVG_PTT)/inc \
         -I$(obj)/$(DEPTH)/cmn_dev/utils/host_diag_log/inc \
         -I$(obj)/$(DEPTH)/cmn_dev/utils/host_diag_log/src \
         -I$(obj)/$(DEPTH)/cmn_dev/utils/ptt/inc \
+        -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/core/inc \
+        -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/core/src \
+        -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/dispatcher/inc \
+        -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/dispatcher/src \
         -I$(WLAN_TOP)/pld/inc
 
 obj-m += qdf.o
@@ -83,6 +87,10 @@ endif
 #linux/src/qdf_net_ioctl.o
 #linux/src/qdf_net_wext.o
 
+ifeq ($(IPA_OFFLOAD), 1)
+qdf-objs += linux/src/qdf_ipa.o
+endif
+
 ifeq ($(MEMORY_DEBUG),1)
 qdf-objs += src/qdf_debug_domain.o \
     src/qdf_tracker.o

+ 21 - 0
qdf/inc/i_qdf_nbuf_api_w.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2017,2019-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -131,6 +132,7 @@ static inline void qdf_nbuf_set_exc_frame(qdf_nbuf_t buf, uint8_t value)
 static inline void qdf_nbuf_set_rx_ipa_smmu_map(qdf_nbuf_t buf,
 						uint8_t value)
 {
+	QDF_NBUF_CB_RX_PACKET_IPA_SMMU_MAP(buf) = value;
 }
 
 /**
@@ -163,10 +165,29 @@ static inline void qdf_nbuf_set_intra_bss(qdf_nbuf_t buf, uint8_t val)
  * Return 0 or 1
  */
 static inline uint8_t qdf_nbuf_is_rx_ipa_smmu_map(qdf_nbuf_t buf)
+{
+	return QDF_NBUF_CB_RX_PACKET_IPA_SMMU_MAP(buf);
+}
+
+static inline int qdf_nbuf_ipa_owned_get(qdf_nbuf_t buf)
+{
+	return 0;
+}
+
+static inline void qdf_nbuf_ipa_owned_set(qdf_nbuf_t buf)
+{ }
+
+static inline void qdf_nbuf_ipa_owned_clear(qdf_nbuf_t buf)
+{ }
+
+static inline int qdf_nbuf_ipa_priv_get(qdf_nbuf_t buf)
 {
 	return 0;
 }
 
+static inline void qdf_nbuf_ipa_priv_set(qdf_nbuf_t buf, uint32_t priv)
+{ }
+
 /**
  * qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt() - set reo destination indication
 						or sw exception flag

+ 55 - 22
qdf/inc/qdf_mem.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -807,6 +808,7 @@ static inline qdf_mem_info_t *qdf_mem_map_table_alloc(uint32_t num)
 	return mem_info_arr;
 }
 
+#ifdef ENHANCED_OS_ABSTRACTION
 /**
  * qdf_update_mem_map_table() - Update DMA memory map info
  * @osdev: Parent device instance
@@ -818,10 +820,31 @@ static inline qdf_mem_info_t *qdf_mem_map_table_alloc(uint32_t num)
  *
  * Return: none
  */
-static inline void qdf_update_mem_map_table(qdf_device_t osdev,
-					    qdf_mem_info_t *mem_info,
-					    qdf_dma_addr_t dma_addr,
-					    uint32_t mem_size)
+void qdf_update_mem_map_table(qdf_device_t osdev,
+			      qdf_mem_info_t *mem_info,
+			      qdf_dma_addr_t dma_addr,
+			      uint32_t mem_size);
+
+/**
+ * qdf_mem_paddr_from_dmaaddr() - get actual physical address from dma address
+ * @osdev: Parent device instance
+ * @dma_addr: DMA/IOVA address
+ *
+ * Get actual physical address from dma_addr based on SMMU enablement status.
+ * IF SMMU Stage 1 tranlation is enabled, DMA APIs return IO virtual address
+ * (IOVA) otherwise returns physical address. So get SMMU physical address
+ * mapping from IOVA.
+ *
+ * Return: dmaable physical address
+ */
+qdf_dma_addr_t qdf_mem_paddr_from_dmaaddr(qdf_device_t osdev,
+					  qdf_dma_addr_t dma_addr);
+#else
+static inline
+void qdf_update_mem_map_table(qdf_device_t osdev,
+			      qdf_mem_info_t *mem_info,
+			      qdf_dma_addr_t dma_addr,
+			      uint32_t mem_size)
 {
 	if (!mem_info) {
 		qdf_nofl_err("%s: NULL mem_info", __func__);
@@ -831,6 +854,14 @@ static inline void qdf_update_mem_map_table(qdf_device_t osdev,
 	__qdf_update_mem_map_table(osdev, mem_info, dma_addr, mem_size);
 }
 
+static inline
+qdf_dma_addr_t qdf_mem_paddr_from_dmaaddr(qdf_device_t osdev,
+					  qdf_dma_addr_t dma_addr)
+{
+	return __qdf_mem_paddr_from_dmaaddr(osdev, dma_addr);
+}
+#endif
+
 /**
  * qdf_mem_smmu_s1_enabled() - Return SMMU stage 1 translation enable status
  * @osdev parent device instance
@@ -842,24 +873,6 @@ static inline bool qdf_mem_smmu_s1_enabled(qdf_device_t osdev)
 	return __qdf_mem_smmu_s1_enabled(osdev);
 }
 
-/**
- * qdf_mem_paddr_from_dmaaddr() - get actual physical address from dma address
- * @osdev: Parent device instance
- * @dma_addr: DMA/IOVA address
- *
- * Get actual physical address from dma_addr based on SMMU enablement status.
- * IF SMMU Stage 1 tranlation is enabled, DMA APIs return IO virtual address
- * (IOVA) otherwise returns physical address. So get SMMU physical address
- * mapping from IOVA.
- *
- * Return: dmaable physical address
- */
-static inline qdf_dma_addr_t qdf_mem_paddr_from_dmaaddr(qdf_device_t osdev,
-							qdf_dma_addr_t dma_addr)
-{
-	return __qdf_mem_paddr_from_dmaaddr(osdev, dma_addr);
-}
-
 /**
  * qdf_mem_dma_get_sgtable() - Returns DMA memory scatter gather table
  * @dev: device instace
@@ -1200,4 +1213,24 @@ void qdf_mem_tx_desc_cnt_update(qdf_atomic_t pending_tx_descs,
  * Return: Pointer to the starting address of the allocated virtual memory
  */
 #define qdf_mem_valloc(size) __qdf_mem_valloc(size, __func__, __LINE__)
+
+#if IS_ENABLED(CONFIG_ARM_SMMU) && defined(ENABLE_SMMU_S1_TRANSLATION)
+/*
+ * typedef qdf_iommu_domain_t: Platform indepedent iommu domain
+ * abstraction
+ */
+typedef __qdf_iommu_domain_t qdf_iommu_domain_t;
+
+/**
+ * qdf_iommu_domain_get_attr() - API to get iommu domain attributes
+ * @domain: iommu domain
+ * @attr: iommu attribute
+ * @data: data pointer
+ *
+ * Return: 0 on success, else errno
+ */
+int
+qdf_iommu_domain_get_attr(qdf_iommu_domain_t *domain,
+			  enum qdf_iommu_attr attr, void *data);
+#endif
 #endif /* __QDF_MEMORY_H */

+ 65 - 0
qdf/inc/qdf_types.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -1524,4 +1525,68 @@ enum qdf_dp_a_status {
 	QDF_A_STATUS_ERROR = -1,
 	QDF_A_STATUS_OK,
 };
+
+/**
+ * enum qdf_iommu_attr- qdf iommu domain attribute
+ * @QDF_DOMAIN_ATTR_GEOMETRY: Domain attribute geometry
+ * @QDF_DOMAIN_ATTR_PAGING: Domain attribute paging
+ * @QDF_DOMAIN_ATTR_WINDOWS: Domain attribute windows
+ * @QDF_DOMAIN_ATTR_FSL_PAMU_STASH: Domain attribute fsl pamu stash
+ * @QDF_DOMAIN_ATTR_FSL_PAMU_ENABLE: Domain attribute fsl pamu enable
+ * @QDF_DOMAIN_ATTR_FSL_PAMUV1: Domain attribute fsl pamu v1
+ * @QDF_DOMAIN_ATTR_NESTING: Domain attribute Nesting
+ * @QDF_DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE: Domain attribute dma use flush queue
+ * @QDF_DOMAIN_ATTR_PT_BASE_ADDR: Domain attribute pt base address
+ * @QDF_DOMAIN_ATTR_CONTEXT_BANK: Domain attribute context bank
+ * @QDF_DOMAIN_ATTR_DYNAMIC: Domain attribute dynamic
+ * @QDF_DOMAIN_ATTR_TTBR0: Domain attribute TTBR0
+ * @QDF_DOMAIN_ATTR_CONTEXTIDR: Domain attribute contextidr
+ * @QDF_DOMAIN_ATTR_PROCID: Domain attribute procid
+ * @QDF_DOMAIN_ATTR_NON_FATAL_FAULTS: Domain attribute non fatal faults
+ * @QDF_DOMAIN_ATTR_S1_BYPASS: Domain attribute S1 bypass
+ * @QDF_DOMAIN_ATTR_ATOMIC: Domain attribute atomic
+ * @QDF_DOMAIN_ATTR_SECURE_VMID: Domain attribute secure cmid
+ * @QDF_DOMAIN_ATTR_FAST: Domain attribute fast
+ * @QDF_DOMAIN_ATTR_PGTBL_INFO: Domain attribute pgtbl info
+ * @QDF_DOMAIN_ATTR_USE_UPSTREAM_HINT: Domain attribute use upsteram hint
+ * @QDF_DOMAIN_ATTR_EARLY_MAP: Domain attribute early map
+ * @QDF_DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT: Domain attribute page table
+ * is coherrent
+ * @QDF_DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT: Domain attribute page table
+ * force coherrent
+ * @QDF_DOMAIN_ATTR_USE_LLC_NWA: Domain attribute use llc nwa
+ * @QDF_DOMAIN_ATTR_SPLIT_TABLES: Domain attribute split tables
+ * @QDF_DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: Domain attribute fault model no cfre
+ * @QDF_DOMAIN_ATTR_FAULT_MODEL_NO_STALL: Domain attribute fault model no stall
+ * @QDF_DOMAIN_ATTR_FAULT_MODEL_HUPCF: Domain attribute fault model hupcf
+ * @QDF_DOMAIN_ATTR_MAX: Domain attribute max
+ */
+enum qdf_iommu_attr {
+	QDF_DOMAIN_ATTR_GEOMETRY,
+	QDF_DOMAIN_ATTR_PAGING,
+	QDF_DOMAIN_ATTR_WINDOWS,
+	QDF_DOMAIN_ATTR_FSL_PAMU_STASH,
+	QDF_DOMAIN_ATTR_FSL_PAMU_ENABLE,
+	QDF_DOMAIN_ATTR_FSL_PAMUV1,
+	QDF_DOMAIN_ATTR_NESTING,
+	QDF_DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
+	QDF_DOMAIN_ATTR_CONTEXT_BANK,
+	QDF_DOMAIN_ATTR_NON_FATAL_FAULTS,
+	QDF_DOMAIN_ATTR_S1_BYPASS,
+	QDF_DOMAIN_ATTR_ATOMIC,
+	QDF_DOMAIN_ATTR_SECURE_VMID,
+	QDF_DOMAIN_ATTR_FAST,
+	QDF_DOMAIN_ATTR_PGTBL_INFO,
+	QDF_DOMAIN_ATTR_USE_UPSTREAM_HINT,
+	QDF_DOMAIN_ATTR_EARLY_MAP,
+	QDF_DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT,
+	QDF_DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT,
+	QDF_DOMAIN_ATTR_USE_LLC_NWA,
+	QDF_DOMAIN_ATTR_SPLIT_TABLES,
+	QDF_DOMAIN_ATTR_FAULT_MODEL_NO_CFRE,
+	QDF_DOMAIN_ATTR_FAULT_MODEL_NO_STALL,
+	QDF_DOMAIN_ATTR_FAULT_MODEL_HUPCF,
+	QDF_DOMAIN_ATTR_MAX,
+};
+
 #endif /* __QDF_TYPES_H */

+ 89 - 0
qdf/linux/src/i_qdf_mem.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -57,6 +58,9 @@
 #define QDF_RET_IP NULL
 #endif /* __KERNEL__ */
 #include <qdf_status.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 9, 0)) && defined(MSM_PLATFORM)
+#include <linux/qcom-iommu-util.h>
+#endif
 
 #if IS_ENABLED(CONFIG_ARM_SMMU)
 #include <pld_common.h>
@@ -223,6 +227,91 @@ static inline bool __qdf_mem_smmu_s1_enabled(qdf_device_t osdev)
 }
 
 #if IS_ENABLED(CONFIG_ARM_SMMU) && defined(ENABLE_SMMU_S1_TRANSLATION)
+/*
+ * typedef __qdf_iommu_domain_t: abstraction for struct iommu_domain
+ */
+typedef struct iommu_domain __qdf_iommu_domain_t;
+
+/**
+ * __qdf_iommu_attr_to_os() - Convert qdf iommu attribute to OS specific enum
+ * @attr: QDF iommu attribute
+ *
+ * Return: enum iommu_attr
+ */
+static inline
+enum iommu_attr __qdf_iommu_attr_to_os(enum qdf_iommu_attr attr)
+{
+	switch (attr) {
+	case QDF_DOMAIN_ATTR_GEOMETRY:
+		return DOMAIN_ATTR_GEOMETRY;
+	case QDF_DOMAIN_ATTR_PAGING:
+		return DOMAIN_ATTR_PAGING;
+	case QDF_DOMAIN_ATTR_WINDOWS:
+		return DOMAIN_ATTR_WINDOWS;
+	case QDF_DOMAIN_ATTR_FSL_PAMU_STASH:
+		return DOMAIN_ATTR_FSL_PAMU_STASH;
+	case QDF_DOMAIN_ATTR_FSL_PAMU_ENABLE:
+		return DOMAIN_ATTR_FSL_PAMU_ENABLE;
+	case QDF_DOMAIN_ATTR_FSL_PAMUV1:
+		return DOMAIN_ATTR_FSL_PAMUV1;
+	case QDF_DOMAIN_ATTR_NESTING:
+		return DOMAIN_ATTR_NESTING;
+	case QDF_DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE:
+		return DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE;
+	case QDF_DOMAIN_ATTR_CONTEXT_BANK:
+		return DOMAIN_ATTR_CONTEXT_BANK;
+	case QDF_DOMAIN_ATTR_NON_FATAL_FAULTS:
+		return DOMAIN_ATTR_NON_FATAL_FAULTS;
+	case QDF_DOMAIN_ATTR_S1_BYPASS:
+		return DOMAIN_ATTR_S1_BYPASS;
+	case QDF_DOMAIN_ATTR_ATOMIC:
+		return DOMAIN_ATTR_ATOMIC;
+	case QDF_DOMAIN_ATTR_SECURE_VMID:
+		return DOMAIN_ATTR_SECURE_VMID;
+	case QDF_DOMAIN_ATTR_FAST:
+		return DOMAIN_ATTR_FAST;
+	case QDF_DOMAIN_ATTR_PGTBL_INFO:
+		return DOMAIN_ATTR_PGTBL_INFO;
+	case QDF_DOMAIN_ATTR_USE_UPSTREAM_HINT:
+		return DOMAIN_ATTR_USE_UPSTREAM_HINT;
+	case QDF_DOMAIN_ATTR_EARLY_MAP:
+		return DOMAIN_ATTR_EARLY_MAP;
+	case QDF_DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT:
+		return DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT;
+	case QDF_DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT:
+		return DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT;
+	case QDF_DOMAIN_ATTR_USE_LLC_NWA:
+		return DOMAIN_ATTR_USE_LLC_NWA;
+	case QDF_DOMAIN_ATTR_SPLIT_TABLES:
+		return DOMAIN_ATTR_SPLIT_TABLES;
+	case QDF_DOMAIN_ATTR_FAULT_MODEL_NO_CFRE:
+		return DOMAIN_ATTR_FAULT_MODEL_NO_CFRE;
+	case QDF_DOMAIN_ATTR_FAULT_MODEL_NO_STALL:
+		return DOMAIN_ATTR_FAULT_MODEL_NO_STALL;
+	case QDF_DOMAIN_ATTR_FAULT_MODEL_HUPCF:
+		return DOMAIN_ATTR_FAULT_MODEL_HUPCF;
+	default:
+		return DOMAIN_ATTR_EXTENDED_MAX;
+	}
+}
+
+/**
+ * __qdf_iommu_domain_get_attr() - API to get iommu domain attributes
+ *
+ * @domain: iommu domain
+ * @attr: iommu attribute
+ * @data: data pointer
+ *
+ * Return: iommu domain attr
+ */
+static inline int
+__qdf_iommu_domain_get_attr(__qdf_iommu_domain_t *domain,
+			    enum qdf_iommu_attr attr, void *data)
+{
+	return iommu_domain_get_attr(domain, __qdf_iommu_attr_to_os(attr),
+				     data);
+}
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0))
 /**
  * __qdf_dev_get_domain() - get iommu domain from osdev

+ 3 - 1
qdf/linux/src/i_qdf_nbuf.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -117,6 +118,7 @@ typedef union {
  * @rx.dev.priv_cb_w.ext_cb_ptr: extended cb pointer
  * @rx.dev.priv_cb_w.fctx: ctx to handle special pkts defined by ftype
  * @rx.dev.priv_cb_w.msdu_len: length of RX packet
+ * @rx.dev.priv_cb_w.ipa_smmu_map: do IPA smmu map
  * @rx.dev.priv_cb_w.peer_id: peer_id for RX packet
  * @rx.dev.priv_cb_w.flag_intra_bss: flag to indicate this is intra bss packet
  * @rx.dev.priv_cb_w.protocol_tag: protocol tag set by app for rcvd packet type
@@ -234,7 +236,7 @@ struct qdf_nbuf_cb {
 					void *fctx;
 					uint16_t msdu_len : 14,
 						 flag_intra_bss : 1,
-						 reserved : 1;
+						 ipa_smmu_map : 1;
 					uint16_t peer_id;
 					uint16_t protocol_tag;
 					uint16_t flow_tag;

+ 5 - 0
qdf/linux/src/i_qdf_nbuf_w.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -101,6 +102,10 @@
 #define __qdf_nbuf_get_rx_flow_tag(skb) \
 		(QDF_NBUF_CB_RX_FLOW_TAG((skb)))
 
+#define  QDF_NBUF_CB_RX_PACKET_IPA_SMMU_MAP(skb) \
+	 (((struct qdf_nbuf_cb *)((skb)->cb))->u.rx.dev.priv_cb_w. \
+	 ipa_smmu_map)
+
 /**
  * qdf_nbuf_cb_update_vdev_id() - update vdev id in skb cb
  * @skb: skb pointer whose cb is updated with vdev id information

+ 2 - 1
qdf/linux/src/i_qdf_types.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -179,7 +180,7 @@ typedef __be16 __qdf_be16_t;
 typedef __be32 __qdf_be32_t;
 typedef __be64 __qdf_be64_t;
 
-#ifdef IPA_OFFLOAD
+#if defined(IPA_OFFLOAD) && defined(__KERNEL__)
 typedef struct ipa_wdi_buffer_info __qdf_mem_info_t;
 #else
 /**

+ 4 - 0
qdf/linux/src/qdf_ipa.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -24,6 +25,7 @@
 
 /* Include Files */
 #include <qdf_ipa.h>
+#include <qdf_module.h>
 
 static uint8_t __qdf_to_ipa_wlan_event(int qdf_ipa_event)
 {
@@ -79,3 +81,5 @@ void __qdf_ipa_set_meta_msg_type(__qdf_ipa_msg_meta_t *meta, int type)
 {
 	meta->msg_type = __qdf_to_ipa_wlan_event(type);
 }
+
+qdf_export_symbol(__qdf_ipa_set_meta_msg_type);

+ 36 - 0
qdf/linux/src/qdf_mem.c

@@ -2886,3 +2886,39 @@ void __qdf_mem_vfree(void *ptr)
 }
 
 qdf_export_symbol(__qdf_mem_vfree);
+
+#if IS_ENABLED(CONFIG_ARM_SMMU) && defined(ENABLE_SMMU_S1_TRANSLATION)
+int
+qdf_iommu_domain_get_attr(qdf_iommu_domain_t *domain,
+			  enum qdf_iommu_attr attr, void *data)
+{
+	return __qdf_iommu_domain_get_attr(domain, attr, data);
+}
+
+qdf_export_symbol(qdf_iommu_domain_get_attr);
+#endif
+
+#ifdef ENHANCED_OS_ABSTRACTION
+void qdf_update_mem_map_table(qdf_device_t osdev,
+			      qdf_mem_info_t *mem_info,
+			      qdf_dma_addr_t dma_addr,
+			      uint32_t mem_size)
+{
+	if (!mem_info) {
+		qdf_nofl_err("%s: NULL mem_info", __func__);
+		return;
+	}
+
+	__qdf_update_mem_map_table(osdev, mem_info, dma_addr, mem_size);
+}
+
+qdf_export_symbol(qdf_update_mem_map_table);
+
+qdf_dma_addr_t qdf_mem_paddr_from_dmaaddr(qdf_device_t osdev,
+					  qdf_dma_addr_t dma_addr)
+{
+	return __qdf_mem_paddr_from_dmaaddr(osdev, dma_addr);
+}
+
+qdf_export_symbol(qdf_mem_paddr_from_dmaaddr);
+#endif

+ 3 - 0
qdf/linux/src/qdf_nbuf.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -4939,6 +4940,8 @@ void __qdf_nbuf_reg_free_cb(qdf_nbuf_free_t cb_func_ptr)
 	nbuf_free_cb = cb_func_ptr;
 }
 
+qdf_export_symbol(__qdf_nbuf_reg_free_cb);
+
 /**
  * qdf_nbuf_classify_pkt() - classify packet
  * @skb - sk buff

+ 5 - 0
spectral/Kbuild

@@ -49,6 +49,11 @@ ifeq ($(WLAN_SUPPORT_GREEN_AP), 1)
 INCS += -I$(obj)/$(DEPTH)/cmn_dev/umac/green_ap/dispatcher/inc
 endif
 
+INCS += -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/core/inc \
+        -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/core/src \
+        -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/dispatcher/inc \
+        -I$(obj)/$(HOST_CMN_CONVG_SRC)/ipa/dispatcher/src
+
 #Start of offload related deifines
 HOST_CMN_CONVG_SRC := $(DEPTH)/cmn_dev
 HOST_CMN_CONVG_HIF_SRC := $(DEPTH)/cmn_dev/hif/src