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qcacmn: Use multi window write and read for pine

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Write into hal register using three floating windows instead of one.
This change is done to avoid frequent window changes for writing into
DP and CE registers. Instead 3 windows are used. One window is statically
mapped to CE block and another window is mapped statically to DP block.
Due to this design there is no need to change the window register to
write into these blocks and write can be done on corresponding window
with single iowrite32. Similar loginc is used for ioread32.

Also modified the hp_addr and tp_addr in initialisation stage so that
hal_write will not have multiple if checks.

Change-Id: Ibb99ec4da7f63323082e46a28afbe90e1f555545
CRs-fixed: 2507441
This commit is contained in:
Nandha Kishore Easwaran
2019-11-05 11:44:46 +05:30
committed by nshrivas
parent 2b0d3f38d5
commit bcf953583a
11 changed files with 203 additions and 14 deletions
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68
hal/wifi3.0/hal_api.h
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@@ -178,6 +178,12 @@ static inline void hal_select_window(struct hal_soc *hal_soc, uint32_t offset,
}
#endif
static inline qdf_iomem_t hal_get_window_address(struct hal_soc *hal_soc,
qdf_iomem_t addr)
{
return hal_soc->ops->hal_get_window_address(hal_soc, addr);
}
/**
* hal_write32_mb() - Access registers to update configuration
* @hal_soc: hal soc handle
@@ -209,12 +215,17 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
uint32_t value, bool ret_confirm)
{
unsigned long flags;
qdf_iomem_t new_addr;
if (!hal_soc->use_register_windowing ||
offset < MAX_UNWINDOWED_ADDRESS) {
qdf_iowrite32(hal_soc->dev_base_addr + offset, value);
hal_reg_write_result_check(hal_soc, offset,
value, ret_confirm);
} else if (hal_soc->static_window_map) {
new_addr = hal_get_window_address(hal_soc,
hal_soc->dev_base_addr + offset);
qdf_iowrite32(new_addr, value);
} else {
hal_lock_reg_access(hal_soc, &flags);
hal_select_window(hal_soc, offset, ret_confirm);
@@ -228,6 +239,28 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
hal_unlock_reg_access(hal_soc, &flags);
}
}
/**
* hal_write_address_32_mb - write a value to a register
*
*/
static inline
void hal_write_address_32_mb(struct hal_soc *hal_soc,
qdf_iomem_t addr, uint32_t value)
{
uint32_t offset;
qdf_iomem_t new_addr;
if (!hal_soc->use_register_windowing)
return qdf_iowrite32(addr, value);
offset = addr - hal_soc->dev_base_addr;
if (hal_soc->static_window_map) {
new_addr = hal_get_window_address(hal_soc, addr);
return qdf_iowrite32(new_addr, value);
}
hal_write32_mb(hal_soc, offset, value, false);
}
#else
static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
uint32_t value, bool ret_confirm)
@@ -279,7 +312,6 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
}
}
}
#endif
/**
* hal_write_address_32_mb - write a value to a register
@@ -287,7 +319,7 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
*/
static inline
void hal_write_address_32_mb(struct hal_soc *hal_soc,
void __iomem *addr, uint32_t value)
qdf_iomem_t addr, uint32_t value)
{
uint32_t offset;
@@ -297,6 +329,14 @@ void hal_write_address_32_mb(struct hal_soc *hal_soc,
offset = addr - hal_soc->dev_base_addr;
hal_write32_mb(hal_soc, offset, value, false);
}
#endif
#ifdef DP_HAL_MULTIWINDOW_DIRECT_ACCESS
#define hal_srng_write_address_32_mb(_a, _b, _c) qdf_iowrite32(_b, _c)
#else
#define hal_srng_write_address_32_mb(_a, _b, _c) \
hal_write_address_32_mb(_a, _b, _c)
#endif
#if !defined(QCA_WIFI_QCA6390) && !defined(QCA_WIFI_QCA6490)
/**
@@ -325,10 +365,14 @@ uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset)
{
uint32_t ret;
unsigned long flags;
qdf_iomem_t new_addr;
if (!hal_soc->use_register_windowing ||
offset < MAX_UNWINDOWED_ADDRESS) {
return qdf_ioread32(hal_soc->dev_base_addr + offset);
} else if (hal_soc->static_window_map) {
new_addr = hal_get_window_address(hal_soc, hal_soc->dev_base_addr + offset);
return qdf_ioread32(new_addr);
}
hal_lock_reg_access(hal_soc, &flags);
@@ -388,15 +432,21 @@ uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset)
*/
static inline
uint32_t hal_read_address_32_mb(struct hal_soc *soc,
void __iomem *addr)
qdf_iomem_t addr)
{
uint32_t offset;
uint32_t ret;
qdf_iomem_t new_addr;
if (!soc->use_register_windowing)
return qdf_ioread32(addr);
offset = addr - soc->dev_base_addr;
if (soc->static_window_map) {
new_addr = hal_get_window_address(soc, addr);
return qdf_ioread32(new_addr);
}
ret = hal_read32_mb(soc, offset);
return ret;
}
@@ -1267,13 +1317,13 @@ hal_srng_access_end_unlocked(void *hal_soc, hal_ring_handle_t hal_ring_hdl)
}
} else {
if (srng->ring_dir == HAL_SRNG_SRC_RING)
hal_write_address_32_mb(hal_soc,
srng->u.src_ring.hp_addr,
srng->u.src_ring.hp);
hal_srng_write_address_32_mb(hal_soc,
srng->u.src_ring.hp_addr,
srng->u.src_ring.hp);
else
hal_write_address_32_mb(hal_soc,
srng->u.dst_ring.tp_addr,
srng->u.dst_ring.tp);
hal_srng_write_address_32_mb(hal_soc,
srng->u.dst_ring.tp_addr,
srng->u.dst_ring.tp);
}
}