Merge "Revert "msm: camera: isp: Disable clk gating in IFE top"" into camera-kernel.lnx.4.0

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.c

@@ -366,20 +366,23 @@ int cam_vfe_top_ver3_init_hw(void *device_priv,
 
 	top_priv->hw_clk_rate = 0;
 
-	/* Disable clock gating at IFE top */
-	CAM_DBG(CAM_ISP, "Disable clock gating at IFE top");
+	/**
+	 * Auto clock gating is enabled by default, but no harm
+	 * in setting the value we expect.
+	 */
+	CAM_DBG(CAM_ISP, "Enabling clock gating at IFE top");
 
 	cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX,
-		common_data.common_reg->core_cgc_ovd_0, 0xFFFFFFFF);
+		common_data.common_reg->core_cgc_ovd_0, 0x0);
 
 	cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX,
-		common_data.common_reg->core_cgc_ovd_1, 0xFF);
+		common_data.common_reg->core_cgc_ovd_1, 0x0);
 
 	cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX,
-		common_data.common_reg->ahb_cgc_ovd, 0x1);
+		common_data.common_reg->ahb_cgc_ovd, 0x0);
 
 	cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX,
-		common_data.common_reg->noc_cgc_ovd, 0x1);
+		common_data.common_reg->noc_cgc_ovd, 0x0);
 
 	top_priv->top_common.hw_version =
 		cam_io_r_mb(common_data.soc_info->reg_map[0].mem_base +