msm: camera: tfe: Move the CSID irq logs to bottom half

Remove the sof log in CSID irq handler and handle it in the
Bottom half. Sof irq enabled during the sof freeze scenario
and sof log getting printed in the irq handler causing
the interrupt handling taking more time.

CRs-Fixed: 2796120
Change-Id: I29341efcf0134f69b9dc8284785044ee08be13b6
Signed-off-by: Ravikishore Pampana <[email protected]>

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_csid_hw/cam_tfe_csid530.h

@@ -165,6 +165,7 @@ static struct cam_tfe_csid_csi2_rx_reg_offset
 	.csi2_rx_phy_num_mask                         = 0x7,
 	.csi2_rx_long_pkt_hdr_rst_stb_shift           = 0x1,
 	.csi2_rx_short_pkt_hdr_rst_stb_shift          = 0x2,
+	.csi2_rx_cphy_pkt_hdr_rst_stb_shift           = 0x3,
 };
 
 static struct cam_tfe_csid_common_reg_offset

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_csid_hw/cam_tfe_csid_core.c

@@ -2334,7 +2334,8 @@ static int cam_tfe_csid_sof_irq_debug(
 	if (csid_hw->hw_info->hw_state ==
 		CAM_HW_STATE_POWER_DOWN) {
 		CAM_WARN(CAM_ISP,
-			"CSID powered down unable to %s sof irq",
+			"CSID:%d powered down unable to %s sof irq",
+			csid_hw->hw_intf->hw_idx,
 			sof_irq_enable ? "enable" : "disable");
 		return 0;
 	}
@@ -2378,8 +2379,10 @@ static int cam_tfe_csid_sof_irq_debug(
 		csid_hw->sof_irq_triggered = false;
 	}
 
-	CAM_INFO(CAM_ISP, "SOF freeze: CSID SOF irq %s",
-		sof_irq_enable ? "enabled" : "disabled");
+	if (!in_irq())
+		CAM_INFO(CAM_ISP, "SOF freeze: CSID:%d SOF irq %s",
+			csid_hw->hw_intf->hw_idx,
+			sof_irq_enable ? "enabled" : "disabled");
 
 	return 0;
 }
@@ -2683,7 +2686,7 @@ static int cam_tfe_csid_process_cmd(void *hw_priv,
 	return rc;
 }
 
-static int cam_csid_get_evt_payload(
+static int cam_tfe_csid_get_evt_payload(
 	struct cam_tfe_csid_hw *csid_hw,
 	struct cam_csid_evt_payload **evt_payload)
 {
@@ -2706,7 +2709,7 @@ static int cam_csid_get_evt_payload(
 	return 0;
 }
 
-static int cam_csid_put_evt_payload(
+static int cam_tfe_csid_put_evt_payload(
 	struct cam_tfe_csid_hw *csid_hw,
 	struct cam_csid_evt_payload **evt_payload)
 {
@@ -2725,35 +2728,17 @@ static int cam_csid_put_evt_payload(
 
 	return 0;
 }
-static char *cam_csid_status_to_str(uint32_t status)
-{
-	switch (status) {
-	case TFE_CSID_IRQ_REG_TOP:
-		return "TOP";
-	case TFE_CSID_IRQ_REG_RX:
-		return "RX";
-	case TFE_CSID_IRQ_REG_IPP:
-		return "IPP";
-	case TFE_CSID_IRQ_REG_RDI0:
-		return "RDI0";
-	case TFE_CSID_IRQ_REG_RDI1:
-		return "RDI1";
-	case TFE_CSID_IRQ_REG_RDI2:
-		return "RDI2";
-	default:
-		return "Invalid IRQ";
-	}
-}
 
-static int cam_csid_evt_bottom_half_handler(
+static int cam_tfe_csid_evt_bottom_half_handler(
 	void *handler_priv,
 	void *evt_payload_priv)
 {
 	struct cam_tfe_csid_hw *csid_hw;
 	struct cam_csid_evt_payload *evt_payload;
+	const struct cam_tfe_csid_reg_offset    *csid_reg;
+	struct cam_isp_hw_event_info event_info;
 	int i;
 	int rc = 0;
-	struct cam_isp_hw_event_info event_info;
 
 	if (!handler_priv || !evt_payload_priv) {
 		CAM_ERR(CAM_ISP,
@@ -2764,6 +2749,7 @@ static int cam_csid_evt_bottom_half_handler(
 
 	csid_hw = (struct cam_tfe_csid_hw *)handler_priv;
 	evt_payload = (struct cam_csid_evt_payload *)evt_payload_priv;
+	csid_reg = csid_hw->csid_info->csid_reg;
 
 	if (!csid_hw->event_cb || !csid_hw->event_cb_priv) {
 		CAM_ERR_RATE_LIMIT(CAM_ISP,
@@ -2783,16 +2769,35 @@ static int cam_csid_evt_bottom_half_handler(
 		goto end;
 	}
 
-	CAM_ERR_RATE_LIMIT(CAM_ISP, "idx %d err %d phy %d",
-		csid_hw->hw_intf->hw_idx,
-		evt_payload->evt_type,
-		csid_hw->csi2_rx_cfg.phy_sel);
-
-	for (i = 0; i < TFE_CSID_IRQ_REG_MAX; i++)
-		CAM_ERR_RATE_LIMIT(CAM_ISP, "status %s: %x",
-			cam_csid_status_to_str(i),
-			evt_payload->irq_status[i]);
+	if (csid_hw->sof_irq_triggered && (evt_payload->evt_type ==
+		CAM_ISP_HW_ERROR_NONE)) {
+		if (evt_payload->irq_status[TFE_CSID_IRQ_REG_IPP] &
+			TFE_CSID_PATH_INFO_INPUT_SOF) {
+			CAM_INFO_RATE_LIMIT(CAM_ISP,
+				"CSID:%d IPP SOF received",
+				csid_hw->hw_intf->hw_idx);
+		}
 
+		for (i = 0; i < csid_reg->cmn_reg->num_rdis; i++) {
+			if (evt_payload->irq_status[i] &
+				TFE_CSID_PATH_INFO_INPUT_SOF)
+				CAM_INFO_RATE_LIMIT(CAM_ISP,
+					"CSID:%d RDI:%d SOF received",
+					csid_hw->hw_intf->hw_idx, i);
+		}
+	} else {
+		CAM_ERR_RATE_LIMIT(CAM_ISP,
+			"CSID %d err %d phy %d irq status TOP: 0x%x RX: 0x%x IPP: 0x%x RDI0: 0x%x RDI1: 0x%x RDI2: 0x%x",
+			csid_hw->hw_intf->hw_idx,
+			evt_payload->evt_type,
+			csid_hw->csi2_rx_cfg.phy_sel,
+			evt_payload->irq_status[TFE_CSID_IRQ_REG_TOP],
+			evt_payload->irq_status[TFE_CSID_IRQ_REG_RX],
+			evt_payload->irq_status[TFE_CSID_IRQ_REG_IPP],
+			evt_payload->irq_status[TFE_CSID_IRQ_REG_RDI0],
+			evt_payload->irq_status[TFE_CSID_IRQ_REG_RDI1],
+			evt_payload->irq_status[TFE_CSID_IRQ_REG_RDI2]);
+	}
 	/* this hunk can be extended to handle more cases
 	 * which we want to offload to bottom half from
 	 * irq handlers
@@ -2810,17 +2815,17 @@ static int cam_csid_evt_bottom_half_handler(
 		break;
 
 	default:
-		CAM_DBG(CAM_ISP, "CSID[%d] invalid error type %d",
+		CAM_DBG(CAM_ISP, "CSID[%d] error type %d",
 			csid_hw->hw_intf->hw_idx,
 			evt_payload->evt_type);
 		break;
 	}
 end:
-	cam_csid_put_evt_payload(csid_hw, &evt_payload);
+	cam_tfe_csid_put_evt_payload(csid_hw, &evt_payload);
 	return 0;
 }
 
-static int cam_csid_handle_hw_err_irq(
+static int cam_tfe_csid_handle_hw_err_irq(
 	struct cam_tfe_csid_hw *csid_hw,
 	int                     evt_type,
 	uint32_t               *irq_status)
@@ -2833,7 +2838,7 @@ static int cam_csid_handle_hw_err_irq(
 	CAM_DBG(CAM_ISP, "CSID[%d] error %d",
 		csid_hw->hw_intf->hw_idx, evt_type);
 
-	rc = cam_csid_get_evt_payload(csid_hw, &evt_payload);
+	rc = cam_tfe_csid_get_evt_payload(csid_hw, &evt_payload);
 	if (rc) {
 		CAM_ERR_RATE_LIMIT(CAM_ISP,
 			"No free payload core %d",
@@ -2861,7 +2866,7 @@ static int cam_csid_handle_hw_err_irq(
 		bh_cmd,
 		csid_hw,
 		evt_payload,
-		cam_csid_evt_bottom_half_handler);
+		cam_tfe_csid_evt_bottom_half_handler);
 
 	return rc;
 }
@@ -2874,7 +2879,7 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data)
 	const struct cam_tfe_csid_csi2_rx_reg_offset   *csi2_reg;
 	uint32_t                   irq_status[TFE_CSID_IRQ_REG_MAX];
 	bool fatal_err_detected = false, is_error_irq = false;
-	uint32_t sof_irq_debug_en = 0;
+	uint32_t sof_irq_debug_en = 0, log_en = 0;
 	unsigned long flags;
 	uint32_t i, val;
 
@@ -3019,7 +3024,7 @@ handle_fatal_error:
 				CAM_SUBDEV_MESSAGE_IRQ_ERR,
 				(csid_hw->csi2_rx_cfg.phy_sel - 1));
 		}
-		cam_csid_handle_hw_err_irq(csid_hw,
+		cam_tfe_csid_handle_hw_err_irq(csid_hw,
 			CAM_ISP_HW_ERROR_CSID_FATAL, irq_status);
 	}
 
@@ -3097,6 +3102,10 @@ handle_fatal_error:
 		CAM_INFO_RATE_LIMIT(CAM_ISP,
 			"CSID:%d long pkt cal CRC:%d expected CRC:%d",
 			csid_hw->hw_intf->hw_idx, (val >> 16), (val & 0xFFFF));
+		/* reset long pkt strobe to capture next long packet */
+		val = (1 << csi2_reg->csi2_rx_long_pkt_hdr_rst_stb_shift);
+		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
+			csi2_reg->csid_csi2_rx_rst_strobes_addr);
 	}
 	if ((csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_SHORT_PKT_CAPTURE) &&
 		(irq_status[TFE_CSID_IRQ_REG_RX] &
@@ -3113,6 +3122,10 @@ handle_fatal_error:
 			csi2_reg->csid_csi2_rx_captured_short_pkt_1_addr);
 		CAM_INFO_RATE_LIMIT(CAM_ISP, "CSID:%d short packet ECC :%d",
 			csid_hw->hw_intf->hw_idx, val);
+		/* reset short pkt strobe to capture next short packet */
+		val = (1 << csi2_reg->csi2_rx_short_pkt_hdr_rst_stb_shift);
+		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
+			csi2_reg->csid_csi2_rx_rst_strobes_addr);
 	}
 
 	if ((csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_CPHY_PKT_CAPTURE) &&
@@ -3126,6 +3139,10 @@ handle_fatal_error:
 			"CSID:%d cphy packet VC :%d DT:%d WC:%d",
 			csid_hw->hw_intf->hw_idx,
 			(val >> 22), ((val >> 16) & 0x1F), (val & 0xFFFF));
+		/* reset cphy pkt strobe to capture next short packet */
+		val = (1 << csi2_reg->csi2_rx_cphy_pkt_hdr_rst_stb_shift);
+		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
+			csi2_reg->csid_csi2_rx_rst_strobes_addr);
 	}
 
 	if (csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_RST_IRQ_LOG) {
@@ -3157,8 +3174,13 @@ handle_fatal_error:
 		if ((irq_status[TFE_CSID_IRQ_REG_IPP] &
 			TFE_CSID_PATH_INFO_INPUT_SOF) &&
 			(csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_SOF_IRQ)) {
-			CAM_INFO_RATE_LIMIT(CAM_ISP, "CSID:%d IPP SOF received",
-				csid_hw->hw_intf->hw_idx);
+			if (!csid_hw->sof_irq_triggered)
+				CAM_INFO_RATE_LIMIT(CAM_ISP,
+				"CSID:%d IPP SOF received",
+					csid_hw->hw_intf->hw_idx);
+			else
+				log_en = 1;
+
 			if (csid_hw->sof_irq_triggered)
 				csid_hw->irq_debug_cnt++;
 		}
@@ -3192,18 +3214,25 @@ handle_fatal_error:
 			(csid_hw->csid_debug &
 			TFE_CSID_DEBUG_ENABLE_RST_IRQ_LOG))
 			CAM_INFO_RATE_LIMIT(CAM_ISP,
-				"CSID RDI%d reset complete", i);
+				"CSID:%d RDI%d reset complete",
+				csid_hw->hw_intf->hw_idx, i);
 
 		if (irq_status[i] &
 			BIT(csid_reg->cmn_reg->path_rst_done_shift_val)) {
-			CAM_DBG(CAM_ISP, "CSID RDI%d reset complete", i);
+			CAM_DBG(CAM_ISP, "CSID:%d RDI%d reset complete",
+				csid_hw->hw_intf->hw_idx, i);
 			complete(&csid_hw->csid_rdin_complete[i]);
 		}
 
 		if ((irq_status[i] & TFE_CSID_PATH_INFO_INPUT_SOF) &&
 			(csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_SOF_IRQ)) {
-			CAM_INFO_RATE_LIMIT(CAM_ISP,
-				"CSID RDI:%d SOF received", i);
+			if (!csid_hw->sof_irq_triggered)
+				CAM_INFO_RATE_LIMIT(CAM_ISP,
+					"CSID:%d RDI:%d SOF received",
+					csid_hw->hw_intf->hw_idx, i);
+			else
+				log_en = 1;
+
 			if (csid_hw->sof_irq_triggered)
 				csid_hw->irq_debug_cnt++;
 		}
@@ -3211,7 +3240,8 @@ handle_fatal_error:
 		if ((irq_status[i] & TFE_CSID_PATH_INFO_INPUT_EOF) &&
 			(csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_EOF_IRQ)) {
 			CAM_INFO_RATE_LIMIT(CAM_ISP,
-				"CSID RDI:%d EOF received", i);
+				"CSID:%d RDI:%d EOF received",
+				csid_hw->hw_intf->hw_idx, i);
 		}
 
 		if (irq_status[i] & TFE_CSID_PATH_ERROR_FIFO_OVERFLOW) {
@@ -3228,16 +3258,9 @@ handle_fatal_error:
 			is_error_irq = true;
 	}
 
-	if (is_error_irq)
-		CAM_ERR_RATE_LIMIT(CAM_ISP,
-			"CSID %d irq status TOP: 0x%x RX: 0x%x IPP: 0x%x RDI0: 0x%x RDI1: 0x%x RDI2: 0x%x",
-			csid_hw->hw_intf->hw_idx,
-			irq_status[TFE_CSID_IRQ_REG_TOP],
-			irq_status[TFE_CSID_IRQ_REG_RX],
-			irq_status[TFE_CSID_IRQ_REG_IPP],
-			irq_status[TFE_CSID_IRQ_REG_RDI0],
-			irq_status[TFE_CSID_IRQ_REG_RDI1],
-			irq_status[TFE_CSID_IRQ_REG_RDI2]);
+	if (is_error_irq || log_en)
+		cam_tfe_csid_handle_hw_err_irq(csid_hw,
+			CAM_ISP_HW_ERROR_NONE, irq_status);
 
 	if (csid_hw->irq_debug_cnt >= CAM_TFE_CSID_IRQ_SOF_DEBUG_CNT_MAX) {
 		cam_tfe_csid_sof_irq_debug(csid_hw, &sof_irq_debug_en);

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_csid_hw/cam_tfe_csid_core.h

@@ -201,6 +201,7 @@ struct cam_tfe_csid_csi2_rx_reg_offset {
 	uint32_t csi2_rx_phy_num_mask;
 	uint32_t csi2_rx_long_pkt_hdr_rst_stb_shift;
 	uint32_t csi2_rx_short_pkt_hdr_rst_stb_shift;
+	uint32_t csi2_rx_cphy_pkt_hdr_rst_stb_shift;
 };
 
 struct cam_tfe_csid_common_reg_offset {