From bae72f6a9b8b4640f7eefbf5ba18af0c11a4ff55 Mon Sep 17 00:00:00 2001 From: Ritesh Kumar Date: Fri, 4 Jun 2021 14:58:17 +0530 Subject: [PATCH] disp: msm: dsi: Add support to enable LP11 insertion feature Some panels may require that the DSI link returns to the low-power stop state (LP11) after transmission of every line. If a panel requires that the DSI link returns to LP11, apply the LP11 insertion between lines feature. This change adds support to - Disable the command mdp burst mode - Enable mdp idle ctrl - Program the No. of dsi pclk cycles of idle time to insert between command mode mdp packets. The idle time must be long enough to cover the time link takes to switch between HS to LP11 mode. Change-Id: Ie718d334f05ce6c1ecd1a05b379bbbe18dec6330 Signed-off-by: Ritesh Kumar --- msm/dsi/dsi_ctrl_hw_cmn.c | 14 +++++++++++--- msm/dsi/dsi_defs.h | 5 +++++ msm/dsi/dsi_panel.c | 15 +++++++++++++++ 3 files changed, 31 insertions(+), 3 deletions(-) diff --git a/msm/dsi/dsi_ctrl_hw_cmn.c b/msm/dsi/dsi_ctrl_hw_cmn.c index b58ae2aa0e..6534bff6c1 100644 --- a/msm/dsi/dsi_ctrl_hw_cmn.c +++ b/msm/dsi/dsi_ctrl_hw_cmn.c @@ -737,15 +737,23 @@ void dsi_ctrl_hw_cmn_cmd_engine_setup(struct dsi_ctrl_hw *ctrl, reg |= cmd_mode_format_map[common_cfg->dst_format]; DSI_W32(ctrl, DSI_COMMAND_MODE_MDP_CTRL, reg); - reg = DSI_R32(ctrl, DSI_COMMAND_MODE_MDP_CTRL2); - reg |= BIT(16); - DSI_W32(ctrl, DSI_COMMAND_MODE_MDP_CTRL2, reg); + if (!cfg->mdp_idle_ctrl_en) { + reg = DSI_R32(ctrl, DSI_COMMAND_MODE_MDP_CTRL2); + reg |= BIT(16); + DSI_W32(ctrl, DSI_COMMAND_MODE_MDP_CTRL2, reg); + } reg = cfg->wr_mem_start & 0xFF; reg |= (cfg->wr_mem_continue & 0xFF) << 8; reg |= (cfg->insert_dcs_command ? BIT(16) : 0); DSI_W32(ctrl, DSI_COMMAND_MODE_MDP_DCS_CMD_CTRL, reg); + if (cfg->mdp_idle_ctrl_en) { + reg = cfg->mdp_idle_ctrl_len & 0x3FF; + reg |= BIT(12); + DSI_W32(ctrl, DSI_COMMAND_MODE_MDP_IDLE_CTRL, reg); + } + DSI_CTRL_HW_DBG(ctrl, "Cmd engine setup done\n"); } diff --git a/msm/dsi/dsi_defs.h b/msm/dsi/dsi_defs.h index 40d121fe83..2a0471e738 100644 --- a/msm/dsi/dsi_defs.h +++ b/msm/dsi/dsi_defs.h @@ -559,12 +559,17 @@ struct dsi_video_engine_cfg { * @wr_mem_continue: DCS command for write_memory_continue. * @insert_dcs_command: Insert DCS command as first byte of payload * of the pixel data. + * @mdp_idle_ctrl_en: Enable idle insertion between command mode mdp packets. + * @mdp_idle_ctrl_len: No. of dsi pclk cycles of idle time to insert between + * command mode mdp packets. */ struct dsi_cmd_engine_cfg { u32 max_cmd_packets_interleave; u32 wr_mem_start; u32 wr_mem_continue; bool insert_dcs_command; + bool mdp_idle_ctrl_en; + u32 mdp_idle_ctrl_len; }; /** diff --git a/msm/dsi/dsi_panel.c b/msm/dsi/dsi_panel.c index b49c60c6d3..fe9a0d86d0 100644 --- a/msm/dsi/dsi_panel.c +++ b/msm/dsi/dsi_panel.c @@ -1657,6 +1657,21 @@ static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg, goto error; } + cfg->mdp_idle_ctrl_en = + utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en"); + + if (cfg->mdp_idle_ctrl_en) { + val = 0; + rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val); + if (rc) { + DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name); + cfg->mdp_idle_ctrl_len = 0; + cfg->mdp_idle_ctrl_en = false; + rc = 0; + } else { + cfg->mdp_idle_ctrl_len = val; + } + } error: return rc; }