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qcacmn: Add hal_rx_msdu_flow_idx_invalid API

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Implement hal_rx_msdu_flow_idx_invalid API
per chipset as the macro
to retrieve the flow_idx_invalid value is
chipset dependent.

Change-Id: I5b8622eb896456b7388016a16657048d0da4e970
CRs-Fixed: 2522133
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-09-25 11:42:07 -07:00
committed by nshrivas
parent c9a4e14344
commit b9a8536661
13 changed files with 132 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
hal/wifi3.0/hal_internal.h
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@@ -438,6 +438,7 @@ struct hal_hw_txrx_ops {
uint32_t reg_val,
struct hal_reo_params *reo_params);
uint32_t (*hal_rx_msdu_flow_idx_get)(uint8_t *buf);
bool (*hal_rx_msdu_flow_idx_invalid)(uint8_t *buf);
};
/**

16
hal/wifi3.0/hal_rx.h
View File

@@ -3242,11 +3242,6 @@ static inline bool hal_rx_msdu_flow_idx_timeout(uint8_t *buf)
return timeout;
}
#define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
RX_MSDU_END_5_FLOW_IDX_INVALID_OFFSET)), \
RX_MSDU_END_5_FLOW_IDX_INVALID_MASK, \
RX_MSDU_END_5_FLOW_IDX_INVALID_LSB))
/**
* hal_rx_msdu_flow_idx_invalid: API to get flow index invalid
* from rx_msdu_end TLV
@@ -3254,14 +3249,13 @@ static inline bool hal_rx_msdu_flow_idx_timeout(uint8_t *buf)
*
* Return: flow index invalid value from MSDU END TLV
*/
static inline bool hal_rx_msdu_flow_idx_invalid(uint8_t *buf)
static inline bool
hal_rx_msdu_flow_idx_invalid(hal_soc_handle_t hal_soc_hdl,
uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
bool invalid;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
invalid = HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end);
return invalid;
return hal_soc->ops->hal_rx_msdu_flow_idx_invalid(buf);
}
/**

16
hal/wifi3.0/qca6290/hal_6290.c
View File

@@ -865,6 +865,21 @@ static inline uint32_t hal_rx_msdu_flow_idx_get_6290(uint8_t *buf)
return HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end);
}
/**
* hal_rx_msdu_flow_idx_invalid_6290: API to get flow index invalid
* from rx_msdu_end TLV
* @buf: pointer to the start of RX PKT TLV headers
*
* Return: flow index invalid value from MSDU END TLV
*/
static bool hal_rx_msdu_flow_idx_invalid_6290(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
return HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end);
}
struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -943,6 +958,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
hal_rx_get_ppdu_id_6290,
hal_reo_config_6290,
hal_rx_msdu_flow_idx_get_6290,
hal_rx_msdu_flow_idx_invalid_6290,
};
struct hal_hw_srng_config hw_srng_table_6290[] = {

6
hal/wifi3.0/qca6290/hal_6290_rx.h
View File

@@ -300,6 +300,12 @@ UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
RX_MSDU_END_14_FLOW_IDX_MASK, \
RX_MSDU_END_14_FLOW_IDX_LSB))
#define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
RX_MSDU_END_5_FLOW_IDX_INVALID_OFFSET)), \
RX_MSDU_END_5_FLOW_IDX_INVALID_MASK, \
RX_MSDU_END_5_FLOW_IDX_INVALID_LSB))
#if defined(QCA_WIFI_QCA6290_11AX)
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\

16
hal/wifi3.0/qca6390/hal_6390.c
View File

@@ -861,6 +861,21 @@ static inline uint32_t hal_rx_msdu_flow_idx_get_6390(uint8_t *buf)
return HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end);
}
/**
* hal_rx_msdu_flow_idx_invalid_6390: API to get flow index invalid
* from rx_msdu_end TLV
* @buf: pointer to the start of RX PKT TLV headers
*
* Return: flow index invalid value from MSDU END TLV
*/
static bool hal_rx_msdu_flow_idx_invalid_6390(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
return HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end);
}
struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -939,6 +954,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
hal_rx_get_ppdu_id_6390,
hal_reo_config_6390,
hal_rx_msdu_flow_idx_get_6390,
hal_rx_msdu_flow_idx_invalid_6390,
};
struct hal_hw_srng_config hw_srng_table_6390[] = {

6
hal/wifi3.0/qca6390/hal_6390_rx.h
View File

@@ -305,6 +305,12 @@ UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
RX_MSDU_END_14_FLOW_IDX_OFFSET)), \
RX_MSDU_END_14_FLOW_IDX_MASK, \
RX_MSDU_END_14_FLOW_IDX_LSB))
#define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
RX_MSDU_END_5_FLOW_IDX_INVALID_OFFSET)), \
RX_MSDU_END_5_FLOW_IDX_INVALID_MASK, \
RX_MSDU_END_5_FLOW_IDX_INVALID_LSB))
/*
* hal_rx_msdu_start_nss_get_6390(): API to get the NSS
* Interval from rx_msdu_start

16
hal/wifi3.0/qca6490/hal_6490.c
View File

@@ -735,6 +735,21 @@ static inline uint32_t hal_rx_msdu_flow_idx_get_6490(uint8_t *buf)
return HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end);
}
/**
* hal_rx_msdu_flow_idx_invalid_6490: API to get flow index invalid
* from rx_msdu_end TLV
* @buf: pointer to the start of RX PKT TLV headers
*
* Return: flow index invalid value from MSDU END TLV
*/
static bool hal_rx_msdu_flow_idx_invalid_6490(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
return HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end);
}
struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
/* tx */
hal_tx_desc_set_mesh_en_6490,
@@ -775,4 +790,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
hal_rx_get_ppdu_id_6490,
hal_reo_config_6490,
hal_rx_msdu_flow_idx_get_6490,
hal_rx_msdu_flow_idx_invalid_6490,
};

6
hal/wifi3.0/qca6490/hal_6490_rx.h
View File

@@ -290,3 +290,9 @@ RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
RX_MSDU_END_12_FLOW_IDX_OFFSET)), \
RX_MSDU_END_12_FLOW_IDX_MASK, \
RX_MSDU_END_12_FLOW_IDX_LSB))
#define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
RX_MSDU_END_10_FLOW_IDX_INVALID_OFFSET)), \
RX_MSDU_END_10_FLOW_IDX_INVALID_MASK, \
RX_MSDU_END_10_FLOW_IDX_INVALID_LSB))

16
hal/wifi3.0/qca8074v1/hal_8074v1.c
View File

@@ -861,6 +861,21 @@ static inline uint32_t hal_rx_msdu_flow_idx_get_8074v1(uint8_t *buf)
return HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end);
}
/**
* hal_rx_msdu_flow_idx_invalid_8074v1: API to get flow index invalid
* from rx_msdu_end TLV
* @buf: pointer to the start of RX PKT TLV headers
*
* Return: flow index invalid value from MSDU END TLV
*/
static bool hal_rx_msdu_flow_idx_invalid_8074v1(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
return HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end);
}
struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
/* init and setup */
@@ -940,6 +955,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
hal_rx_get_ppdu_id_8074v1,
hal_reo_config_8074v1,
hal_rx_msdu_flow_idx_get_8074v1,
hal_rx_msdu_flow_idx_invalid_8074v1,
};
struct hal_hw_srng_config hw_srng_table_8074[] = {

6
hal/wifi3.0/qca8074v1/hal_8074v1_rx.h
View File

@@ -289,6 +289,12 @@ UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
RX_MSDU_END_14_FLOW_IDX_MASK, \
RX_MSDU_END_14_FLOW_IDX_LSB))
#define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
RX_MSDU_END_5_FLOW_IDX_INVALID_OFFSET)), \
RX_MSDU_END_5_FLOW_IDX_INVALID_MASK, \
RX_MSDU_END_5_FLOW_IDX_INVALID_LSB))
/*
* hal_rx_msdu_start_nss_get_8074(): API to get the NSS
* Interval from rx_msdu_start

16
hal/wifi3.0/qca8074v2/hal_8074v2.c
View File

@@ -858,6 +858,21 @@ static inline uint32_t hal_rx_msdu_flow_idx_get_8074v2(uint8_t *buf)
return HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end);
}
/**
* hal_rx_msdu_flow_idx_invalid_8074v2: API to get flow index invalid
* from rx_msdu_end TLV
* @buf: pointer to the start of RX PKT TLV headers
*
* Return: flow index invalid value from MSDU END TLV
*/
static bool hal_rx_msdu_flow_idx_invalid_8074v2(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
return HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end);
}
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
/* init and setup */
@@ -938,6 +953,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
hal_rx_get_ppdu_id_8074v2,
hal_reo_config_8074v2,
hal_rx_msdu_flow_idx_get_8074v2,
hal_rx_msdu_flow_idx_invalid_8074v2,
};
struct hal_hw_srng_config hw_srng_table_8074v2[] = {

6
hal/wifi3.0/qca8074v2/hal_8074v2_rx.h
View File

@@ -298,6 +298,12 @@ UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
RX_MSDU_END_14_FLOW_IDX_MASK, \
RX_MSDU_END_14_FLOW_IDX_LSB))
#define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
RX_MSDU_END_5_FLOW_IDX_INVALID_OFFSET)), \
RX_MSDU_END_5_FLOW_IDX_INVALID_MASK, \
RX_MSDU_END_5_FLOW_IDX_INVALID_LSB))
/*
* hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
* Interval from rx_msdu_start

16
hal/wifi3.0/qcn9000/hal_9000.c
View File

@@ -867,6 +867,21 @@ static inline uint32_t hal_rx_msdu_flow_idx_get_9000(uint8_t *buf)
return HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end);
}
/**
* hal_rx_msdu_flow_idx_invalid_9000: API to get flow index invalid
* from rx_msdu_end TLV
* @buf: pointer to the start of RX PKT TLV headers
*
* Return: flow index invalid value from MSDU END TLV
*/
static bool hal_rx_msdu_flow_idx_invalid_9000(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
return HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end);
}
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
/* init and setup */
@@ -947,6 +962,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
hal_rx_get_ppdu_id_9000,
hal_reo_config_9000,
hal_rx_msdu_flow_idx_get_9000,
hal_rx_msdu_flow_idx_invalid_9000,
};
struct hal_hw_srng_config hw_srng_table_9000[] = {