Merge changes Iea651a2f,Idb564927 into display-kernel.lnx.5.4

* changes:
  disp: sde: add CRTC property for VM requests
  disp: msm: sde: add capability flag for trusted VM support

msm/msm_drv.h

@@ -172,6 +172,7 @@ enum msm_mdp_crtc_property {
 
 	CRTC_PROP_IDLE_PC_STATE,
 	CRTC_PROP_CACHE_STATE,
+	CRTC_PROP_VM_REQ_STATE,
 
 	/* total # of properties */
 	CRTC_PROP_COUNT

msm/sde/sde_crtc.c

@@ -5245,6 +5245,12 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc,
 		{CACHE_STATE_ENABLED, "cache_state_enabled"},
 	};
 
+	static const struct drm_prop_enum_list e_vm_req_state[] = {
+		{VM_REQ_NONE, "vm_req_none"},
+		{VM_REQ_RELEASE, "vm_req_release"},
+		{VM_REQ_ACQUIRE, "vm_req_acquire"},
+	};
+
 	SDE_DEBUG("\n");
 
 	if (!crtc || !catalog) {
@@ -5283,6 +5289,15 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc,
 		"idle_time", 0, 0, U64_MAX, 0,
 		CRTC_PROP_IDLE_TIMEOUT);
 
+	if (catalog->has_trusted_vm_support) {
+		int init_idx = sde_in_trusted_vm(sde_kms) ? 1 : 0;
+
+		msm_property_install_enum(&sde_crtc->property_info,
+			"vm_request_state", 0x0, 0, e_vm_req_state,
+			ARRAY_SIZE(e_vm_req_state), init_idx,
+			CRTC_PROP_VM_REQ_STATE);
+	}
+
 	if (catalog->has_idle_pc)
 		msm_property_install_enum(&sde_crtc->property_info,
 			"idle_pc_state", 0x0, 0, e_idle_pc_state,

msm/sde/sde_crtc.h

@@ -88,6 +88,18 @@ enum sde_crtc_cache_state {
 	CACHE_STATE_FRAME_READ
 };
 
+/**
+ * enum sde_crtc_vm_req: request for VM operations
+ * @VM_REQ_NONE: no request. Normal VM operations.
+ * @VM_REQ_RELEASE: request to release the HW resources from the current VM
+ * @VM_REQ_ACQUIRE: request to acquire the HW resources in the current VM
+ */
+enum sde_crtc_vm_req {
+	VM_REQ_NONE,
+	VM_REQ_RELEASE,
+	VM_REQ_ACQUIRE,
+};
+
 /**
  * @connectors    : Currently associated drm connectors for retire event
  * @num_connectors: Number of associated drm connectors for retire event

msm/sde/sde_hw_catalog.c

@@ -4727,6 +4727,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->vbif_disable_inner_outer_shareable = true;
 		sde_cfg->dither_luma_mode_support = true;
 		sde_cfg->mdss_hw_block_size = 0x158;
+		sde_cfg->has_trusted_vm_support = true;
 	} else {
 		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);
 		sde_cfg->perf.min_prefill_lines = 0xffff;

msm/sde/sde_hw_catalog.h

@@ -1406,6 +1406,7 @@ struct sde_perf_cfg {
  * @has_qsync	       Supports qsync feature
  * @has_3d_merge_reset Supports 3D merge reset
  * @has_decimation     Supports decimation
+ * @has_trusted_vm_support	     Supported HW sharing with trusted VM
  * @has_mixer_combined_alpha     Mixer has single register for FG & BG alpha
  * @vbif_disable_inner_outer_shareable     VBIF requires disabling shareables
  * @inline_disable_const_clr     Disable constant color during inline rotate
@@ -1480,6 +1481,7 @@ struct sde_mdss_cfg {
 	bool dither_luma_mode_support;
 	bool has_base_layer;
 	bool has_demura;
+	bool has_trusted_vm_support;
 	u32 demura_supported[SSPP_MAX][2];
 	u32 qseed_sw_lib_rev;
 	u32 qseed_hw_version;