Revert "Revert "dsp: add afe function to send cps configuration""

This reverts commit 5efb3a4ee3959f20ed2b697663205ec9a6bd1e5c.

Change-Id: Iff31ace5e9deccb8f4a702217a4a08270f19d5a8

dsp/q6afe.c

@@ -2179,6 +2179,66 @@ fail_cmd:
 	return ret;
 }
 
+/**
+ * afe_send_cps_config -
+ *         to send cps speaker protection configuration
+ *
+ * @src_port: source port to send configuration to
+ * @cps_config: cps speaker protection v4 configuration
+ * @param_size: size of payload
+ *
+ * Returns 0 on success or error value on failure.
+ */
+int afe_send_cps_config(int src_port,
+			struct afe_cps_hw_intf_cfg *cps_config,
+			int param_size)
+{
+	struct param_hdr_v3 param_info;
+	int ret = -EINVAL;
+	u8 *packed_payload = NULL;
+	int cpy_size = 0;
+
+	ret = q6audio_validate_port(src_port);
+	if (ret < 0) {
+		pr_err("%s: Invalid src port 0x%x ret %d", __func__,
+		       src_port, ret);
+		return -EINVAL;
+	}
+
+	packed_payload = kzalloc(param_size, GFP_KERNEL);
+	if (packed_payload == NULL)
+		return -ENOMEM;
+
+	cpy_size = sizeof(struct afe_cps_hw_intf_cfg) -
+			sizeof(cps_config->spkr_dep_cfg);
+	memcpy(packed_payload, cps_config, cpy_size);
+	memcpy(packed_payload + cpy_size, cps_config->spkr_dep_cfg,
+		sizeof(struct lpass_swr_spkr_dep_cfg_t)
+			* cps_config->hw_reg_cfg.num_spkr);
+
+	memset(&param_info, 0, sizeof(param_info));
+
+	mutex_lock(&this_afe.afe_cmd_lock);
+	param_info.module_id = AFE_MODULE_SPEAKER_PROTECTION_V4_RX;
+	param_info.instance_id = INSTANCE_ID_0;
+	param_info.param_id = AFE_PARAM_ID_CPS_LPASS_HW_INTF_CFG;
+	param_info.param_size = param_size;
+
+	ret = q6afe_pack_and_set_param_in_band(src_port,
+					       q6audio_get_port_index(src_port),
+					       param_info, packed_payload);
+	if (ret)
+		pr_err("%s: port = 0x%x param = 0x%x failed %d\n", __func__,
+		       src_port, param_info.param_id, ret);
+
+	mutex_unlock(&this_afe.afe_cmd_lock);
+	pr_debug("%s: config.pdata.param_id 0x%x status %d 0x%x\n", __func__,
+		 param_info.param_id, ret, src_port);
+	kfree(packed_payload);
+	return ret;
+}
+EXPORT_SYMBOL(afe_send_cps_config);
+
 static int afe_spk_prot_prepare(int src_port, int dst_port, int param_id,
 		union afe_spkr_prot_config *prot_config, uint32_t param_size)
 {

include/dsp/apr_audio-v2.h

@@ -10,6 +10,9 @@
 #include <ipc/apr.h>
 #include <audio/linux/msm_audio.h>
 
+/* number of threshold levels in speaker protection module */
+#define MAX_CPS_LEVELS 3
+
 /* size of header needed for passing data out of band */
 #define APR_CMD_OB_HDR_SZ  12
 
@@ -2364,6 +2367,28 @@ int16_t        excursionf[AFE_SPKR_PROT_EXCURSIONF_LEN];
  */
 } __packed;
 
+struct lpass_swr_spkr_dep_cfg_t {
+	uint32_t vbatt_pkd_reg_addr;
+	uint32_t temp_pkd_reg_addr;
+	uint32_t value_normal_thrsd[MAX_CPS_LEVELS];
+	uint32_t value_low1_thrsd[MAX_CPS_LEVELS];
+	uint32_t value_low2_thrsd[MAX_CPS_LEVELS];
+} __packed;
+
+struct lpass_swr_hw_reg_cfg_t {
+	uint32_t lpass_wr_cmd_reg_phy_addr;
+	uint32_t lpass_rd_cmd_reg_phy_addr;
+	uint32_t lpass_rd_fifo_reg_phy_addr;
+	uint32_t vbatt_lower1_threshold;
+	uint32_t vbatt_lower2_threshold;
+	uint32_t num_spkr;
+} __packed;
+
+struct afe_cps_hw_intf_cfg {
+	uint32_t lpass_hw_intf_cfg_mode;
+	struct lpass_swr_hw_reg_cfg_t hw_reg_cfg;
+	struct lpass_swr_spkr_dep_cfg_t *spkr_dep_cfg;
+} __packed;
 
 #define AFE_SERVICE_CMD_REGISTER_RT_PORT_DRIVER	0x000100E0
 
@@ -10808,6 +10833,7 @@ struct cmd_set_topologies {
 #define AFE_PARAM_ID_FBSP_MODE_RX_CFG 0x0001021D
 #define AFE_PARAM_ID_FBSP_PTONE_RAMP_CFG 0x00010260
 #define AFE_PARAM_ID_SP_RX_TMAX_XMAX_LOGGING 0x000102BC
+#define AFE_PARAM_ID_CPS_LPASS_HW_INTF_CFG 0x000102EF
 
 struct asm_fbsp_mode_rx_cfg {
 	uint32_t minor_version;

include/dsp/q6afe-v2.h

@@ -438,6 +438,9 @@ int afe_pseudo_port_start_nowait(u16 port_id);
 int afe_pseudo_port_stop_nowait(u16 port_id);
 int afe_set_lpass_clock(u16 port_id, struct afe_clk_cfg *cfg);
 int afe_set_lpass_clock_v2(u16 port_id, struct afe_clk_set *cfg);
+int afe_send_cps_config(int src_port,
+			struct afe_cps_hw_intf_cfg *cps_config,
+			int param_size);
 int afe_set_lpass_clk_cfg(int index, struct afe_clk_set *cfg);
 int afe_set_digital_codec_core_clock(u16 port_id,
 			struct afe_digital_clk_cfg *cfg);