qcacmn: Add hal_rx_msdu_flow_idx_timeout API
Implement hal_rx_msdu_flow_idx_timeout API per chipset as the macro to retrieve the flow_idx_timeout value is chipset dependent. Change-Id: I03030e3763b3c4a9099699a2d24b8110961610cf CRs-Fixed: 2522133
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committed by
nshrivas

parent
b9a8536661
commit
b5ec9d28ee
@@ -3219,12 +3219,6 @@ hal_rx_msdu_flow_idx_get(hal_soc_handle_t hal_soc_hdl,
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return hal_soc->ops->hal_rx_msdu_flow_idx_get(buf);
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}
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#define HAL_RX_MSDU_END_FLOW_IDX_TIMEOUT_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_5_FLOW_IDX_TIMEOUT_OFFSET)), \
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RX_MSDU_END_5_FLOW_IDX_TIMEOUT_MASK, \
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RX_MSDU_END_5_FLOW_IDX_TIMEOUT_LSB))
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/**
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* hal_rx_msdu_flow_idx_timeout: API to get flow index timeout
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* from rx_msdu_end TLV
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@@ -3232,14 +3226,13 @@ hal_rx_msdu_flow_idx_get(hal_soc_handle_t hal_soc_hdl,
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*
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* Return: flow index timeout value from MSDU END TLV
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*/
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static inline bool hal_rx_msdu_flow_idx_timeout(uint8_t *buf)
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static inline bool
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hal_rx_msdu_flow_idx_timeout(hal_soc_handle_t hal_soc_hdl,
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uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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bool timeout;
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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timeout = HAL_RX_MSDU_END_FLOW_IDX_TIMEOUT_GET(msdu_end);
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return timeout;
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return hal_soc->ops->hal_rx_msdu_flow_idx_timeout(buf);
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}
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/**
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