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@@ -1046,7 +1046,7 @@ int gen8_start(struct adreno_device *adreno_dev)
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u32 hbb_lo = 1, hbb_hi = 0, hbb = 1;
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u32 hbb_lo = 1, hbb_hi = 0, hbb = 1;
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struct cpu_gpu_lock *pwrup_lock = adreno_dev->pwrup_reglist->hostptr;
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struct cpu_gpu_lock *pwrup_lock = adreno_dev->pwrup_reglist->hostptr;
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u64 uche_trap_base = gen8_get_uche_trap_base();
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u64 uche_trap_base = gen8_get_uche_trap_base();
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- u32 rgba8888_lossless = 0;
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+ u32 rgba8888_lossless = 0, fp16compoptdis = 0;
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/* Reset aperture fields to go through first aperture write check */
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/* Reset aperture fields to go through first aperture write check */
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gen8_dev->aperture = UINT_MAX;
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gen8_dev->aperture = UINT_MAX;
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@@ -1121,6 +1121,7 @@ int gen8_start(struct adreno_device *adreno_dev)
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case KGSL_UBWC_4_0:
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case KGSL_UBWC_4_0:
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amsbc = 1;
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amsbc = 1;
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rgb565_predicator = 1;
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rgb565_predicator = 1;
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+ fp16compoptdis = 1;
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rgba8888_lossless = 1;
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rgba8888_lossless = 1;
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mode2 = 2;
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mode2 = 2;
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break;
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break;
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@@ -1151,6 +1152,7 @@ int gen8_start(struct adreno_device *adreno_dev)
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gen8_regwrite_aperture(device, GEN8_RB_CMP_NC_MODE_CNTL,
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gen8_regwrite_aperture(device, GEN8_RB_CMP_NC_MODE_CNTL,
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FIELD_PREP(GENMASK(17, 15), mode2) |
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FIELD_PREP(GENMASK(17, 15), mode2) |
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FIELD_PREP(GENMASK(4, 4), rgba8888_lossless) |
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FIELD_PREP(GENMASK(4, 4), rgba8888_lossless) |
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+ FIELD_PREP(GENMASK(3, 3), fp16compoptdis) |
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FIELD_PREP(GENMASK(2, 2), rgb565_predicator) |
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FIELD_PREP(GENMASK(2, 2), rgb565_predicator) |
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FIELD_PREP(GENMASK(1, 1), amsbc) |
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FIELD_PREP(GENMASK(1, 1), amsbc) |
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FIELD_PREP(GENMASK(0, 0), mal),
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FIELD_PREP(GENMASK(0, 0), mal),
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