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asoc: codecs: Update sequence for HPH path in rouleur

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Update HPHL and HPHR sequence to avoid clicks and pops
by setting the LDIV and RDIV values in HD2
coefficients and increasing ramp time.

Change-Id: Ib47d14255a098511393b4b75392854c8b34dc0d3
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>
This commit is contained in:
Aditya Bavanari
2020-03-24 17:40:39 +05:30
committed by Gerrit - the friendly Code Review server
parent d155d7f509
commit b4364f47ec
5 changed files with 29 additions and 4 deletions
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2
asoc/codecs/rouleur/rouleur-tables.c
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@@ -36,10 +36,12 @@ const u8 rouleur_reg_access_analog[ROULEUR_REG(
[ROULEUR_REG(ROULEUR_ANA_MBHC_MCLK)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT)] = RD_REG,
[ROULEUR_REG(ROULEUR_ANA_NCP_EN)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_HPHPA_CNP_CTL_1)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_HPHPA_CNP_CTL_2)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_HPHPA_PA_STATUS)] = RD_REG,
[ROULEUR_REG(ROULEUR_ANA_HPHPA_FSM_CLK)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_HPHPA_SPARE_CTL)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_SWR_HPHPA_HD2)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_SURGE_EN)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_COMBOPA_CTL)] = RD_WR_REG,
[ROULEUR_REG(ROULEUR_ANA_RXLDO_CTL)] = RD_WR_REG,