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qcacmn: Initial changes for Pebble bring-up in HIF Layer.

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Add device Id and target type checks for qcn6432 target
compilation.

Change-Id: Id95d5902e3f3711ab6836b72dc3bcb66b1abf3c6
CRs-Fixed: 3351550
This commit is contained in:
Adwait Nayak
2023-04-14 00:54:18 +05:30
committed by Madan Koyyalamudi
parent 37050737b1
commit b37c9cf461
12 changed files with 123 additions and 6 deletions
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1
hif/inc/hif.h
View File

@@ -86,6 +86,7 @@ typedef void *hif_handle_t;
#define HIF_TYPE_QCN9160 31
#define HIF_TYPE_PEACH 32
#define HIF_TYPE_WCN6450 33
#define HIF_TYPE_QCN6432 34
#define DMA_COHERENT_MASK_DEFAULT 37

1
hif/inc/hostdef.h
View File

@@ -50,4 +50,5 @@ extern struct hostdef_s *QCN9224_HOSTDEF;
extern struct hostdef_s *QCA9574_HOSTDEF;
extern struct hostdef_s *QCA5332_HOSTDEF;
extern struct hostdef_s *QCN9160_HOSTDEF;
extern struct hostdef_s *QCN6432_HOSTDEF;
#endif

5
hif/inc/target_type.h
View File

@@ -109,6 +109,11 @@ extern "C" {
#define TARGET_TYPE_WCN6450 38
#endif
/* Pebble */
#ifndef TARGET_TYPE_QCN6432
#define TARGET_TYPE_QCN6432 39
#endif
#ifdef __cplusplus
}
#endif

2
hif/inc/targetdef.h
View File

@@ -50,6 +50,7 @@ extern struct targetdef_s *QCN9224_TARGETDEF;
extern struct targetdef_s *QCA9574_TARGETDEF;
extern struct targetdef_s *QCA5332_TARGETDEF;
extern struct targetdef_s *QCN9160_TARGETDEF;
extern struct targetdef_s *QCN6432_TARGETDEF;
extern struct ce_reg_def *AR6002_CE_TARGETdef;
extern struct ce_reg_def *AR6003_CE_TARGETdef;
@@ -75,5 +76,6 @@ extern struct ce_reg_def *QCN9224_CE_TARGETDEF;
extern struct ce_reg_def *QCA9574_CE_TARGETDEF;
extern struct ce_reg_def *QCA5332_CE_TARGETDEF;
extern struct ce_reg_def *QCN9160_CE_TARGETDEF;
extern struct ce_reg_def *QCN6432_CE_TARGETDEF;
#endif

2
hif/src/ath_procfs.c
View File

@@ -118,6 +118,7 @@ static ssize_t ath_procfs_diag_read_legacy(struct file *file,
(tgt_info->target_type == TARGET_TYPE_QCN9224) ||
(tgt_info->target_type == TARGET_TYPE_QCN6122) ||
(tgt_info->target_type == TARGET_TYPE_QCN9160) ||
(tgt_info->target_type == TARGET_TYPE_QCN6432) ||
(tgt_info->target_type == TARGET_TYPE_QCA5018) ||
(tgt_info->target_type == TARGET_TYPE_QCA5332) ||
(tgt_info->target_type == TARGET_TYPE_QCA6018) ||
@@ -204,6 +205,7 @@ static ssize_t ath_procfs_diag_write_legacy(struct file *file,
(tgt_info->target_type == TARGET_TYPE_QCN9224) ||
(tgt_info->target_type == TARGET_TYPE_QCN6122) ||
(tgt_info->target_type == TARGET_TYPE_QCN9160) ||
(tgt_info->target_type == TARGET_TYPE_QCN6432) ||
(tgt_info->target_type == TARGET_TYPE_QCA5018) ||
(tgt_info->target_type == TARGET_TYPE_QCA5332) ||
(tgt_info->target_type == TARGET_TYPE_QCA6018) ||

61
hif/src/ce/ce_assignment.h
View File

@@ -1119,6 +1119,67 @@ static struct CE_pipe_config target_ce_config_wlan_qcn9160[] = {
#define PKTLOG_DST_ENTRIES 512
#endif
#define QCN_6432_CE_COUNT 12
/* Interrupt mode */
static struct CE_attr host_ce_config_wlan_qcn6432[] = {
/* host->target HTC control and raw streams */
{/*CE0*/ (CE_ATTR_FLAGS), 0, 16, 2048, 0, NULL,},
/* target->host HTT + HTC control */
{/*CE1*/ (CE_ATTR_FLAGS), 0, 0, 2048, 512, NULL,},
/* target->host WMI */
{/*CE2*/ (CE_ATTR_FLAGS), 0, 0, 2048, 128, NULL,},
/* host->target WMI */
{/*CE3*/ (CE_ATTR_FLAGS), 0, 32, 2048, 0, NULL,},
/* host->target HTT */
{/*CE4*/ (CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0,
CE_HTT_H2T_MSG_SRC_NENTRIES, 256, 0, NULL,},
/* target -> host PKTLOG */
#ifdef REMOVE_PKT_LOG
{ /* CE5 */ 0, 0, 0, 0, 0, NULL,},
#else
{/*CE5*/ (CE_ATTR_FLAGS), 0, 0, 2048, PKTLOG_DST_ENTRIES, NULL,},
#endif
/* Target autonomous HIF_memcpy */
{/*CE6*/ (CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0, 0, 0, 0, NULL,},
/* CV Prefetch */
{/*CE7*/ (CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0, 0, 0, 0, NULL,},
/* Target HIF memcpy (Generic HIF memcypy) */
{/*CE8*/ (CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0, 0, 0, 0, NULL,},
/* WMI logging/CFR/Spectral/Radar/ */
{/*CE9*/ (CE_ATTR_FLAGS), 0, 0, 2048, 128, NULL,},
/* Customer reserve */
{/*CE10*/ (CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0, 0, 0, 0, NULL,},
/* Un-assigned */
{/*CE11*/ (CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0, 0, 0, 0, NULL,},
};
static struct CE_pipe_config target_ce_config_wlan_qcn6432[] = {
/* host->target HTC control and raw streams */
{ /* CE0 */ 0, PIPEDIR_OUT, 32, 2048, CE_ATTR_FLAGS, 0,},
/* target->host HTT */
{ /* CE1 */ 1, PIPEDIR_IN, 32, 2048, CE_ATTR_FLAGS, 0,},
/* target->host WMI + HTC control */
{ /* CE2 */ 2, PIPEDIR_IN, 32, 2048, CE_ATTR_FLAGS, 0,},
/* host->target WMI */
{ /* CE3 */ 3, PIPEDIR_OUT, 32, 2048, CE_ATTR_FLAGS, 0,},
/* host->target HTT */
{ /* CE4 */ 4, PIPEDIR_OUT, 256, 256,
(CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0,},
/* Target -> host PKTLOG */
{ /* CE5 */ 5, PIPEDIR_IN, 32, 2048, CE_ATTR_FLAGS, 0,},
/* Reserved for target autonomous HIF_memcpy */
{ /* CE6 */ 6, PIPEDIR_INOUT, 32, 16384, CE_ATTR_FLAGS, 0,},
/* CE7 Reserved for CV Prefetch */
{ /* CE7 */ 7, PIPEDIR_OUT, 32, 2048, CE_ATTR_FLAGS, 0,},
/* CE8 Reserved for target generic HIF memcpy */
{ /* CE8 */ 8, PIPEDIR_INOUT, 32, 16384, CE_ATTR_FLAGS, 0,},
/* WMI logging/CFR/Spectral/Radar/ */
{ /* CE9 */ 9, PIPEDIR_IN, 32, 2048, CE_ATTR_FLAGS, 0,},
/* CE 10,11 to be defined */
{/* CE11 unused */10, PIPEDIR_NONE, 0, 0, 0, 0,},
{/* CE11 unused */11, PIPEDIR_NONE, 0, 0, 0, 0,},
};
#define QCA_5332_CE_COUNT 12
static struct CE_attr host_ce_config_wlan_qca5332[] = {
/* host->target HTC control and raw streams */

22
hif/src/ce/ce_main.c
View File

@@ -878,7 +878,7 @@ static struct service_to_pipe target_service_to_ce_map_qcn9000[] = {
};
#endif
#if (defined(QCA_WIFI_QCA5332))
#if (defined(QCA_WIFI_QCA5332) || defined(QCA_WIFI_QCN6432))
static struct service_to_pipe target_service_to_ce_map_qca5332[] = {
{ WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, },
{ WMI_DATA_VO_SVC, PIPEDIR_IN, 2, },
@@ -1518,6 +1518,7 @@ static void hif_select_service_to_pipe_map(struct hif_softc *scn,
sz_tgt_svc_map_to_use);
break;
case TARGET_TYPE_QCA5332:
case TARGET_TYPE_QCN6432:
*tgt_svc_map_to_use = target_service_to_ce_map_qca5332;
*sz_tgt_svc_map_to_use =
sizeof(target_service_to_ce_map_qca5332);
@@ -1831,6 +1832,7 @@ bool ce_srng_based(struct hif_softc *scn)
case TARGET_TYPE_QCN9224:
case TARGET_TYPE_QCA9574:
case TARGET_TYPE_QCA5332:
case TARGET_TYPE_QCN6432:
return true;
default:
return false;
@@ -2510,6 +2512,16 @@ struct CE_handle *ce_init(struct hif_softc *scn,
goto error_target_access;
ce_ring_test_initial_indexes(CE_id, src_ring,
"src_ring");
if (CE_state->attr_flags & CE_ATTR_ENABLE_POLL) {
qdf_timer_init(scn->qdf_dev,
&CE_state->poll_timer,
ce_poll_timeout,
CE_state,
QDF_TIMER_TYPE_WAKE_APPS);
ce_enable_polling(CE_state);
qdf_timer_mod(&CE_state->poll_timer,
CE_POLL_TIMEOUT);
}
}
}
@@ -4409,6 +4421,14 @@ void hif_ce_prepare_config(struct hif_softc *scn)
scn->ce_count = QCN_9160_CE_COUNT;
scn->ini_cfg.disable_wake_irq = 1;
break;
case TARGET_TYPE_QCN6432:
hif_state->host_ce_config = host_ce_config_wlan_qcn6432;
hif_state->target_ce_config = target_ce_config_wlan_qcn6432;
hif_state->target_ce_config_sz =
sizeof(target_ce_config_wlan_qcn6432);
scn->ce_count = QCN_6432_CE_COUNT;
scn->ini_cfg.disable_wake_irq = 1;
break;
case TARGET_TYPE_QCA5018:
hif_state->host_ce_config = host_ce_config_wlan_qca5018;
hif_state->target_ce_config = target_ce_config_wlan_qca5018;

6
hif/src/hif_main.c
View File

@@ -1780,6 +1780,12 @@ int hif_get_device_type(uint32_t device_id,
hif_info(" *********** QCN9160 *************");
break;
case QCN6432_DEVICE_ID:
*hif_type = HIF_TYPE_QCN6432;
*target_type = TARGET_TYPE_QCN6432;
hif_info(" *********** QCN6432 *************");
break;
case QCN7605_DEVICE_ID:
case QCN7605_COMPOSITE:
case QCN7605_STANDALONE:

1
hif/src/hif_main.h
View File

@@ -94,6 +94,7 @@
#define QCN9224_DEVICE_ID (0x1109)
#define QCN6122_DEVICE_ID (0xFFFB)
#define QCN9160_DEVICE_ID (0xFFF8)
#define QCN6432_DEVICE_ID (0xFFF7)
#define QCA6390_EMULATION_DEVICE_ID (0x0108)
#define QCA6390_DEVICE_ID (0x1101)
/* TODO: change IDs for HastingsPrime */

6
hif/src/pcie/if_pci.c
View File

@@ -1743,7 +1743,8 @@ int hif_pci_bus_configure(struct hif_softc *hif_sc)
(hif_sc->target_info.target_type == TARGET_TYPE_QCA5018) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCN6122) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCN9160) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCA6018)) &&
(hif_sc->target_info.target_type == TARGET_TYPE_QCA6018) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCN6432)) &&
(hif_sc->bus_type == QDF_BUS_TYPE_AHB)) {
hif_sc->per_ce_irq = true;
}
@@ -1768,7 +1769,8 @@ int hif_pci_bus_configure(struct hif_softc *hif_sc)
(hif_sc->target_info.target_type == TARGET_TYPE_QCA5018) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCN6122) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCN9160) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCA6018)) &&
(hif_sc->target_info.target_type == TARGET_TYPE_QCA6018) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCN6432)) &&
(hif_sc->bus_type == QDF_BUS_TYPE_PCI))
hif_debug("Skip irq config for PCI based 8074 target");
else {

13
hif/src/regtable.c
View File

@@ -159,6 +159,14 @@ void hif_target_register_tbl_attach(struct hif_softc *scn, u32 target_type)
break;
#endif
#if defined(QCN6432_HEADERS_DEF)
case TARGET_TYPE_QCN6432:
scn->targetdef = QCN6432_TARGETDEF;
scn->target_ce_def = QCN6432_CE_TARGETDEF;
hif_info("TARGET_TYPE_QCN6432");
break;
#endif
#if defined(QCA5018_HEADERS_DEF)
case TARGET_TYPE_QCA5018:
scn->targetdef = QCA5018_TARGETDEF;
@@ -330,6 +338,11 @@ void hif_register_tbl_attach(struct hif_softc *scn, u32 hif_type)
scn->hostdef = QCN9160_HOSTDEF;
break;
#endif
#if defined(QCN6432_HEADERS_DEF)
case HIF_TYPE_QCN6432:
scn->hostdef = QCN6432_HOSTDEF;
break;
#endif
#if defined(QCA5018_HEADERS_DEF)
case HIF_TYPE_QCA5018:
scn->hostdef = QCA5018_HOSTDEF;

9
hif/src/snoc/if_ahb.c
View File

@@ -495,7 +495,8 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
}
if (target_type == TARGET_TYPE_QCN6122 ||
target_type == TARGET_TYPE_QCN9160) {
target_type == TARGET_TYPE_QCN9160 ||
target_type == TARGET_TYPE_QCN6432) {
hif_ahb_get_bar_addr_pld(sc, dev);
}
@@ -504,7 +505,8 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
hif_ahb_get_soc_cmem_info_pld(sc, dev);
if (target_type == TARGET_TYPE_QCN6122 ||
target_type == TARGET_TYPE_QCN9160) {
target_type == TARGET_TYPE_QCN9160 ||
target_type == TARGET_TYPE_QCN6432) {
hif_update_irq_ops_with_pci(ol_sc);
} else {
status = pfrm_platform_get_resource(&pdev->dev,
@@ -828,7 +830,8 @@ void hif_display_ahb_irq_regs(struct hif_softc *scn)
struct hif_target_info *tgt_info = &scn->target_info;
if (tgt_info->target_type == TARGET_TYPE_QCN6122 ||
tgt_info->target_type == TARGET_TYPE_QCN9160) {
tgt_info->target_type == TARGET_TYPE_QCN9160 ||
tgt_info->target_type == TARGET_TYPE_QCN6432) {
return;
}
if (scn->per_ce_irq) {