Video Driver: fix frame freeze for HEVC 10bit all intra decoding
1. Allow turbo for HEVC 10bit all intra decoding; 2. Add 25 percent extra to VSP cycle for HEVC 10bit all intra decoding; Change-Id: I794b2a896f7e9444c8979abdb15b8e673a5270ee Signed-off-by: Zhongbo Shi <quic_zhongbos@quicinc.com> Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
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@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include "msm_vidc_power_iris3.h"
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@@ -213,6 +213,11 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size)
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if (fps >= 960)
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vsp_cycles += div_u64(vpp_cycles * 25, 100);
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/* Add 25 percent extra for HEVC 10bit all intra use case */
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if (inst->iframe && is_hevc_10bit_decode_session(inst)) {
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vsp_cycles += div_u64(vsp_cycles * 25, 100);
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}
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if (inst->codec == MSM_VIDC_VP9 &&
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inst->capabilities->cap[STAGE].value ==
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MSM_VIDC_STAGE_2 &&
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@@ -228,11 +233,14 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size)
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freq = max(vpp_cycles, vsp_cycles);
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freq = max(freq, fw_cycles);
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if (inst->codec != MSM_VIDC_AV1) {
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if (inst->codec == MSM_VIDC_AV1 ||
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(inst->iframe && is_hevc_10bit_decode_session(inst))) {
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/*
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* for non-AV1 codecs limit the frequency to NOM only
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* index 0 is TURBO, index 1 is NOM clock rate
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* for AV1 or HEVC 10bit and iframe case only allow TURBO and
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* limit to NOM for all other cases
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*/
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} else {
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/* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */
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if (core->resource->freq_set.count >= 2 &&
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freq > core->resource->freq_set.freq_tbl[1].freq)
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freq = core->resource->freq_set.freq_tbl[1].freq;
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@@ -212,6 +212,11 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size)
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if (fps >= 960)
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vsp_cycles += div_u64(vpp_cycles * 25, 100);
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/* Add 25 percent extra for HEVC 10bit all intra use case */
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if (inst->iframe && is_hevc_10bit_decode_session(inst)) {
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vsp_cycles += div_u64(vsp_cycles * 25, 100);
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}
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if (inst->codec == MSM_VIDC_VP9 &&
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inst->capabilities->cap[STAGE].value ==
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MSM_VIDC_STAGE_2 &&
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@@ -227,11 +232,14 @@ u64 msm_vidc_calc_freq_iris33(struct msm_vidc_inst *inst, u32 data_size)
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freq = max(vpp_cycles, vsp_cycles);
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freq = max(freq, fw_cycles);
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if (inst->codec != MSM_VIDC_AV1) {
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if (inst->codec == MSM_VIDC_AV1 ||
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(inst->iframe && is_hevc_10bit_decode_session(inst))) {
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/*
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* for non-AV1 codecs limit the frequency to NOM only
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* index 0 is TURBO, index 1 is NOM clock rate
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* for AV1 or HEVC 10bit and iframe case only allow TURBO and
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* limit to NOM for all other cases
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*/
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} else {
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/* limit to NOM, index 0 is TURBO, index 1 is NOM clock rate */
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if (core->resource->freq_set.count >= 2 &&
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freq > core->resource->freq_set.freq_tbl[1].freq)
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freq = core->resource->freq_set.freq_tbl[1].freq;
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