qcacmn: Check system suspend status before REO CMD ring access
REO module may hang when REO commands are queued after WoW enable WMI sent to FW. Change is used to check WoW progress before accessing REO CMD ring. If WoW is in progress, then defer REO commands. Change-Id: I9cd8390e77ef33f98f84cb604f152e3f9a0e4203 CRs-Fixed: 3362608
This commit is contained in:

committed by
Madan Koyyalamudi

szülő
0ec15d3777
commit
b05959171c
@@ -15102,6 +15102,7 @@ static QDF_STATUS dp_bus_resume(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
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for (i = 0; i < soc->num_tcl_data_rings; i++)
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for (i = 0; i < soc->num_tcl_data_rings; i++)
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dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
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dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
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dp_flush_ring_hptp(soc, soc->reo_cmd_ring.hal_srng);
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dp_rx_fst_update_pm_suspend_status(soc, false);
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dp_rx_fst_update_pm_suspend_status(soc, false);
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dp_rx_fst_requeue_wq(soc);
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dp_rx_fst_requeue_wq(soc);
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@@ -1947,13 +1947,22 @@ hal_srng_rtpm_access_end(hal_soc_handle_t hal_soc_hdl,
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hal_ring_handle_t hal_ring_hdl,
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hal_ring_handle_t hal_ring_hdl,
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uint32_t rtpm_id)
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uint32_t rtpm_id)
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{
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{
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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if (qdf_unlikely(!hal_ring_hdl)) {
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if (qdf_unlikely(!hal_ring_hdl)) {
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qdf_print("Error: Invalid hal_ring\n");
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qdf_print("Error: Invalid hal_ring\n");
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return;
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return;
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}
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}
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, rtpm_id) == 0) {
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, rtpm_id) == 0) {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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if (hif_system_pm_state_check(hal_soc->hif_handle)) {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
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hal_srng_inc_flush_cnt(hal_ring_hdl);
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} else {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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}
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, rtpm_id);
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, rtpm_id);
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} else {
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} else {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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@@ -357,7 +357,14 @@ hal_reo_cmd_queue_stats_li(hal_ring_handle_t hal_ring_hdl,
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cmd->u.stats_params.clear);
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cmd->u.stats_params.clear);
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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if (hif_system_pm_state_check(hal_soc->hif_handle)) {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
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hal_srng_inc_flush_cnt(hal_ring_hdl);
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} else {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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}
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
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} else {
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} else {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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@@ -498,7 +505,14 @@ hal_reo_cmd_flush_cache_li(hal_ring_handle_t hal_ring_hdl,
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cp->flush_entire_cache);
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cp->flush_entire_cache);
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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if (hif_system_pm_state_check(hal_soc->hif_handle)) {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
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hal_srng_inc_flush_cnt(hal_ring_hdl);
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} else {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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}
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
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} else {
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} else {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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@@ -819,7 +833,14 @@ hal_reo_cmd_update_rx_queue_li(hal_ring_handle_t hal_ring_hdl,
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PN_127_96, p->pn_127_96);
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PN_127_96, p->pn_127_96);
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
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if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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if (hif_system_pm_state_check(hal_soc->hif_handle)) {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
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hal_srng_inc_flush_cnt(hal_ring_hdl);
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} else {
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hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
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}
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
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hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
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} else {
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} else {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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