qcacmn: Check system suspend status before REO CMD ring access

REO module may hang when REO commands are queued after WoW enable WMI
sent to FW. Change is used to check WoW progress before accessing REO
CMD ring. If WoW is in progress, then defer REO commands.

Change-Id: I9cd8390e77ef33f98f84cb604f152e3f9a0e4203
CRs-Fixed: 3362608
Este commit está contenido en:
Yu Tian
2022-12-14 22:50:26 -08:00
cometido por Madan Koyyalamudi
padre 0ec15d3777
commit b05959171c
Se han modificado 3 ficheros con 35 adiciones y 4 borrados

Ver fichero

@@ -15102,6 +15102,7 @@ static QDF_STATUS dp_bus_resume(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
for (i = 0; i < soc->num_tcl_data_rings; i++)
dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
dp_flush_ring_hptp(soc, soc->reo_cmd_ring.hal_srng);
dp_rx_fst_update_pm_suspend_status(soc, false);
dp_rx_fst_requeue_wq(soc);

Ver fichero

@@ -1947,13 +1947,22 @@ hal_srng_rtpm_access_end(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl,
uint32_t rtpm_id)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (qdf_unlikely(!hal_ring_hdl)) {
qdf_print("Error: Invalid hal_ring\n");
return;
}
if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, rtpm_id) == 0) {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
if (hif_system_pm_state_check(hal_soc->hif_handle)) {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
hal_srng_inc_flush_cnt(hal_ring_hdl);
} else {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
}
hif_rtpm_put(HIF_RTPM_PUT_ASYNC, rtpm_id);
} else {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);

Ver fichero

@@ -357,7 +357,14 @@ hal_reo_cmd_queue_stats_li(hal_ring_handle_t hal_ring_hdl,
cmd->u.stats_params.clear);
if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
if (hif_system_pm_state_check(hal_soc->hif_handle)) {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
hal_srng_inc_flush_cnt(hal_ring_hdl);
} else {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
}
hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
} else {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
@@ -498,7 +505,14 @@ hal_reo_cmd_flush_cache_li(hal_ring_handle_t hal_ring_hdl,
cp->flush_entire_cache);
if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
if (hif_system_pm_state_check(hal_soc->hif_handle)) {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
hal_srng_inc_flush_cnt(hal_ring_hdl);
} else {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
}
hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
} else {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
@@ -819,7 +833,14 @@ hal_reo_cmd_update_rx_queue_li(hal_ring_handle_t hal_ring_hdl,
PN_127_96, p->pn_127_96);
if (hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_HAL_REO_CMD) == 0) {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
if (hif_system_pm_state_check(hal_soc->hif_handle)) {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
hal_srng_inc_flush_cnt(hal_ring_hdl);
} else {
hal_srng_access_end(hal_soc_hdl, hal_ring_hdl);
}
hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_HAL_REO_CMD);
} else {
hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);