disp: msm: dsi: update CPHY command mode clock calculation

In CPHY, packet header and checksum is sent twice and SYNC is
sent in between two headers. So, increase packet overhead used
in clock calculation to 15 bytes. Packet Header: 8 bytes,
CRC: 4 bytes, SYNC: 2 bytes and dcs command: 1 byte.

Change-Id: I7a1160cbb57ba4f1faeb4b36a16c322e6069d58f
Signed-off-by: Ritesh Kumar <[email protected]>

msm/dsi/dsi_panel.c

@@ -3875,13 +3875,18 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
 	struct dsi_mode_info *timing = &mode->timing;
 	struct dsi_display_mode *display_mode;
 	u32 jitter_numer, jitter_denom, prefill_lines;
-	u32 min_threshold_us, prefill_time_us, max_transfer_us;
+	u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
 	u16 bpp;
 
-	/* Packet overlead in bits,2 bytes header + 2 bytes checksum
-	 * + 1 byte dcs data command.
+	/* Packet overhead in bits,
+	 * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
+	 * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
+	 * 1 byte dcs data command.
 	*/
-	const u32 packet_overhead = 56;
+	if (config->phy_type & DSI_PHY_TYPE_CPHY)
+		packet_overhead = 120;
+	else
+		packet_overhead = 56;
 
 	display_mode = container_of(timing, struct dsi_display_mode, timing);