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disp: msm: sde: Add roi region for spr

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Provide spr_roi region for spr over fetch in partial update.
Support different the roi size of connector and crtc.

Change-Id: Ic78a20badcafefd353a97532281dae26e5a772de
Signed-off-by: Qing Huang <quic_huangq@quicinc.com>
This commit is contained in:
Qing Huang
2023-04-17 18:14:24 +08:00
parent 7d8dbc2fb3
commit afeb7da4d7
5 changed files with 47 additions and 14 deletions
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7
include/uapi/display/drm/sde_drm.h
View File

@@ -519,15 +519,22 @@ struct sde_drm_wb_cfg {
}; };
#define SDE_MAX_ROI_V1 4 #define SDE_MAX_ROI_V1 4
#define SDE_DRM_SPR_ROI 1
/* DRM_ROI_CONFIG_FLAGS */
#define SDE_DRM_ROI_SPR_FLAG_EN (1 << 0)
/** /**
* struct sde_drm_roi_v1 - list of regions of interest for a drm object * struct sde_drm_roi_v1 - list of regions of interest for a drm object
* @num_rects: number of valid rectangles in the roi array * @num_rects: number of valid rectangles in the roi array
* @roi: list of roi rectangles * @roi: list of roi rectangles
* @roi_feature_flags: flags indicates that specific roi rect is valid or not
* @spr_roi: list of roi rectangles for spr
*/ */
struct sde_drm_roi_v1 { struct sde_drm_roi_v1 {
__u32 num_rects; __u32 num_rects;
struct drm_clip_rect roi[SDE_MAX_ROI_V1]; struct drm_clip_rect roi[SDE_MAX_ROI_V1];
__u32 roi_feature_flags;
struct drm_clip_rect spr_roi[SDE_MAX_ROI_V1];
}; };
/** /**

4
msm/msm_drv.h
View File

@@ -961,10 +961,14 @@ struct msm_display_info {
* struct msm_roi_list - list of regions of interest for a drm object * struct msm_roi_list - list of regions of interest for a drm object
* @num_rects: number of valid rectangles in the roi array * @num_rects: number of valid rectangles in the roi array
* @roi: list of roi rectangles * @roi: list of roi rectangles
* @roi_feature_flags: flags indicates that specific roi rect is valid or not
* @spr_roi: list of roi rectangles for spr
*/ */
struct msm_roi_list { struct msm_roi_list {
uint32_t num_rects; uint32_t num_rects;
struct drm_clip_rect roi[MSM_MAX_ROI]; struct drm_clip_rect roi[MSM_MAX_ROI];
uint32_t roi_feature_flags;
struct drm_clip_rect spr_roi[MSM_MAX_ROI];
}; };
/** /**

4
msm/sde/sde_color_processing.c
View File

@@ -957,9 +957,9 @@ static int _check_spr_pu_feature(struct sde_hw_dspp *hw_dspp,
return -EINVAL; return -EINVAL;
} }
if ((roi_list->roi[0].x2 - roi_list->roi[0].x1) != hw_cfg->displayh) { if ((roi_list->spr_roi[0].x2 - roi_list->spr_roi[0].x1) != hw_cfg->displayh) {
SDE_ERROR("pu region not full width %d\n", SDE_ERROR("pu region not full width %d\n",
(roi_list->roi[0].x2 - roi_list->roi[0].x1)); (roi_list->spr_roi[0].x2 - roi_list->spr_roi[0].x1));
return -EINVAL; return -EINVAL;
} }

34
msm/sde/sde_crtc.c
View File

@@ -977,9 +977,18 @@ static int _sde_crtc_set_roi_v1(struct drm_crtc_state *state,
return -EINVAL; return -EINVAL;
} }
cstate->user_roi_list.roi_feature_flags = roi_v1.roi_feature_flags;
cstate->user_roi_list.num_rects = roi_v1.num_rects; cstate->user_roi_list.num_rects = roi_v1.num_rects;
for (i = 0; i < roi_v1.num_rects; ++i) { for (i = 0; i < roi_v1.num_rects; ++i) {
cstate->user_roi_list.roi[i] = roi_v1.roi[i]; cstate->user_roi_list.roi[i] = roi_v1.roi[i];
if (cstate->user_roi_list.roi_feature_flags & SDE_DRM_ROI_SPR_FLAG_EN)
cstate->user_roi_list.spr_roi[i] = roi_v1.spr_roi[i];
else
/*
* backward compatible, spr_roi has the same value with roi,
* it will have the same behavior with before.
*/
cstate->user_roi_list.spr_roi[i] = roi_v1.roi[i];
SDE_DEBUG("crtc%d: roi%d: roi (%d,%d) (%d,%d)\n", SDE_DEBUG("crtc%d: roi%d: roi (%d,%d) (%d,%d)\n",
DRMID(crtc), i, DRMID(crtc), i,
cstate->user_roi_list.roi[i].x1, cstate->user_roi_list.roi[i].x1,
@@ -991,6 +1000,17 @@ static int _sde_crtc_set_roi_v1(struct drm_crtc_state *state,
cstate->user_roi_list.roi[i].y1, cstate->user_roi_list.roi[i].y1,
cstate->user_roi_list.roi[i].x2, cstate->user_roi_list.roi[i].x2,
cstate->user_roi_list.roi[i].y2); cstate->user_roi_list.roi[i].y2);
SDE_DEBUG("crtc%d, roi_feature_flags %d: spr roi%d: spr roi (%d,%d) (%d,%d)\n",
DRMID(crtc), roi_v1.roi_feature_flags, i,
roi_v1.spr_roi[i].x1,
roi_v1.spr_roi[i].y1,
roi_v1.spr_roi[i].x2,
roi_v1.spr_roi[i].y2);
SDE_EVT32_VERBOSE(DRMID(crtc), roi_v1.roi_feature_flags,
roi_v1.spr_roi[i].x1,
roi_v1.spr_roi[i].y1,
roi_v1.spr_roi[i].x2,
roi_v1.spr_roi[i].y2);
} }
return 0; return 0;
@@ -1055,13 +1075,15 @@ static int _sde_crtc_set_crtc_roi(struct drm_crtc *crtc,
continue; continue;
/* /*
* current driver only supports same connector and crtc size, * When enable spr 2D filter in PU, it require over fetch lines.
* but if support for different sizes is added, driver needs * In this case, the roi size of connector and crtc are different.
* to check the connector roi here to make sure is full screen * But the spr_roi is the original roi with over fetch lines,
* for dsc 3d-mux topology that doesn't support partial update. * that should same with connector size.
*/ */
if (memcmp(&sde_conn_state->rois, &crtc_state->user_roi_list, if (memcmp(&sde_conn_state->rois.roi, &crtc_state->user_roi_list.spr_roi,
sizeof(crtc_state->user_roi_list))) { sizeof(crtc_state->user_roi_list.spr_roi)) &&
(sde_conn_state->rois.num_rects !=
crtc_state->user_roi_list.num_rects)) {
SDE_ERROR("%s: crtc -> conn roi scaling unsupported\n", SDE_ERROR("%s: crtc -> conn roi scaling unsupported\n",
sde_crtc->name); sde_crtc->name);
return -EINVAL; return -EINVAL;

12
msm/sde/sde_hw_reg_dma_v1_color_proc.c
View File

@@ -5902,14 +5902,14 @@ int reg_dmav1_setup_spr_pu_common(struct sde_hw_dspp *ctx, struct sde_hw_cp_cfg
return -EINVAL; return -EINVAL;
} }
if ((roi_list->roi[0].x2 - roi_list->roi[0].x1) != hw_cfg->displayh) { if ((roi_list->spr_roi[0].x2 - roi_list->spr_roi[0].x1) != hw_cfg->displayh) {
DRM_ERROR("pu region not full width %d\n", DRM_ERROR("pu region not full width %d\n",
(roi_list->roi[0].x2 - roi_list->roi[0].x1)); (roi_list->spr_roi[0].x2 - roi_list->spr_roi[0].x1));
return -EINVAL; return -EINVAL;
} }
reg = APPLY_MASK_AND_SHIFT(roi_list->roi[0].x1, 16, 0) | reg = APPLY_MASK_AND_SHIFT(roi_list->spr_roi[0].x1, 16, 0) |
APPLY_MASK_AND_SHIFT(roi_list->roi[0].y1, 16, 16); APPLY_MASK_AND_SHIFT(roi_list->spr_roi[0].y1, 16, 16);
} }
REG_DMA_INIT_OPS(dma_write_cfg, MDSS, SPR_PU_CFG, buffer); REG_DMA_INIT_OPS(dma_write_cfg, MDSS, SPR_PU_CFG, buffer);
@@ -6007,10 +6007,10 @@ void reg_dmav1_setup_spr_pu_cfgv2(struct sde_hw_dspp *ctx, void *cfg)
uint32_t reg = ctx->spr_cfg_18_default; uint32_t reg = ctx->spr_cfg_18_default;
//No ROI list means full screen update so apply without modification //No ROI list means full screen update so apply without modification
if (roi_list && roi_list->roi[0].y1 != 0) if (roi_list && roi_list->spr_roi[0].y1 != 0)
reg &= 0xFFFFFFFC; reg &= 0xFFFFFFFC;
if (roi_list && roi_list->roi[0].y2 != hw_cfg->displayv) if (roi_list && roi_list->spr_roi[0].y2 != hw_cfg->displayv)
reg &= 0xFFFFFFCF; reg &= 0xFFFFFFCF;
base_off = ctx->hw.blk_off + ctx->cap->sblk->spr.base; base_off = ctx->hw.blk_off + ctx->cap->sblk->spr.base;