samsung-sm8650/android_kernel_samsung_sm8650-modules
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Fastforwarding dataipa CRT:data-kernel.lnx.2.0-221103 to data-kernel.lnx.3.0 branch

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Este commit está contenido en:
Santosh Sai Krishna
2022-11-04 11:42:35 +05:30
padre ff1ca3fa02 6dfbf84ead
commit ae5791c585
Se han modificado 22 ficheros con 273 adiciones y 84 borrados
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2
dataipa_dlkm_vendor_board.mk
Ver fichero

@@ -9,7 +9,7 @@ else
endif
ifeq ($(TARGET_DATAIPA_DLKM_ENABLE), true)
DATA_DLKM_BOARD_PLATFORMS_LIST := taro kalama bengal
DATA_DLKM_BOARD_PLATFORMS_LIST := taro kalama bengal monaco
ifneq ($(TARGET_BOARD_AUTO),true)
ifeq ($(call is-board-platform-in-list,$(DATA_DLKM_BOARD_PLATFORMS_LIST)),true)
BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/gsim.ko

2
drivers/platform/msm/Android.mk
Ver fichero

@@ -1,5 +1,5 @@
ifneq ($(TARGET_BOARD_PLATFORM),qssi)
GSI_DLKM_PLATFORMS_LIST := taro kalama bengal
GSI_DLKM_PLATFORMS_LIST := taro kalama bengal monaco
ifeq ($(call is-board-platform-in-list, $(GSI_DLKM_PLATFORMS_LIST)),true)
#Make file to create GSI DLKM

2
drivers/platform/msm/Kbuild
Ver fichero

@@ -36,7 +36,7 @@ LINUXINCLUDE += -include $(srctree)/../../vendor/qcom/opensource/dataipa/conf
endif
endif
ifeq ($(CONFIG_ARCH_KHAJE), y)
ifeq ($(filter $(CONFIG_ARCH_KHAJE) $(CONFIG_ARCH_MONACO), y), y)
DATAIPADRVTOP = $(srctree)/../../vendor/qcom/opensource/dataipa/drivers/platform/msm
LINUXINCLUDE += -include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_vendor_ipav4.h
include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_GKI_ipav4.conf

55
drivers/platform/msm/gsi/gsi.c
Ver fichero

@@ -1865,8 +1865,8 @@ static void gsi_program_evt_ring_ctx(struct gsi_evt_ring_props *props,
struct gsihal_reg_ev_ch_k_cntxt_3 ev_ch_k_cntxt_3;
struct gsihal_reg_ev_ch_k_cntxt_8 ev_ch_k_cntxt_8;
struct gsihal_reg_ev_ch_k_cntxt_9 ev_ch_k_cntxt_9;
struct gsihal_reg_ev_ch_k_cntxt_10 ev_ch_k_cntxt_10;
struct gsihal_reg_ev_ch_k_cntxt_11 ev_ch_k_cntxt_11;
union gsihal_reg_ev_ch_k_cntxt_10 ev_ch_k_cntxt_10;
union gsihal_reg_ev_ch_k_cntxt_11 ev_ch_k_cntxt_11;
struct gsihal_reg_ev_ch_k_cntxt_12 ev_ch_k_cntxt_12;
struct gsihal_reg_ev_ch_k_cntxt_13 ev_ch_k_cntxt_13;
@@ -1904,25 +1904,41 @@ static void gsi_program_evt_ring_ctx(struct gsi_evt_ring_props *props,
ee, evt_id,
&ev_ch_k_cntxt_9);
ev_ch_k_cntxt_10.msi_addr_lsb = GSI_LSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_10,
ee, evt_id,
&ev_ch_k_cntxt_10);
if(props->intf != GSI_EVT_CHTYPE_WDI3_V2_EV) {
ev_ch_k_cntxt_10.msi_addr_lsb = GSI_LSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_10,
ee, evt_id,
&ev_ch_k_cntxt_10);
ev_ch_k_cntxt_11.msi_addr_msb = GSI_MSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_11,
ee, evt_id,
&ev_ch_k_cntxt_11);
ev_ch_k_cntxt_11.msi_addr_msb = GSI_MSB(props->msi_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_11,
ee, evt_id,
&ev_ch_k_cntxt_11);
ev_ch_k_cntxt_12.rp_update_addr_lsb = GSI_LSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_12,
ee, evt_id,
&ev_ch_k_cntxt_12);
ev_ch_k_cntxt_13.rp_update_addr_msb = GSI_MSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_13,
ee, evt_id,
&ev_ch_k_cntxt_13);
}
else {
ev_ch_k_cntxt_10.rp_addr_lsb = GSI_LSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_10,
ee, evt_id,
&ev_ch_k_cntxt_10);
ev_ch_k_cntxt_11.rp_addr_msb = GSI_MSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_11,
ee, evt_id,
&ev_ch_k_cntxt_11);
}
ev_ch_k_cntxt_12.rp_update_addr_lsb = GSI_LSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_12,
ee, evt_id,
&ev_ch_k_cntxt_12);
ev_ch_k_cntxt_13.rp_update_addr_msb = GSI_MSB(props->rp_update_addr);
gsihal_write_reg_nk_fields(GSI_EE_n_EV_CH_k_CNTXT_13,
ee, evt_id,
&ev_ch_k_cntxt_13);
}
static void gsi_init_evt_ring(struct gsi_evt_ring_props *props,
@@ -2721,6 +2737,7 @@ static void gsi_program_chan_ctx(struct gsi_chan_props *props, unsigned int ee,
case GSI_CHAN_PROT_WDI3:
case GSI_CHAN_PROT_GCI:
case GSI_CHAN_PROT_MHIP:
case GSI_CHAN_PROT_WDI3_V2:
ch_k_cntxt_0.chtype_protocol_msb = 0;
break;
case GSI_CHAN_PROT_AQC:
@@ -4263,7 +4280,7 @@ int gsi_queue_xfer(unsigned long chan_hdl, uint16_t num_xfers,
if (ctx->props.prot != GSI_CHAN_PROT_GCI) {
__gsi_query_channel_free_re(ctx, &free);
if (num_xfers > free) {
GSIERR("chan_hdl=%lu num_xfers=%u free=%u\n",
GSIERR_RL("chan_hdl=%lu num_xfers=%u free=%u\n",
chan_hdl, num_xfers, free);
spin_unlock_irqrestore(slock, flags);
return -GSI_STATUS_RING_INSUFFICIENT_SPACE;

45
drivers/platform/msm/gsi/gsi.h
Ver fichero

@@ -87,6 +87,18 @@
} \
} while (0)
#define GSIERR_RL(fmt, args...) \
do { \
dev_err_ratelimited(gsi_ctx->dev, "%s:%d " fmt, __func__, __LINE__, \
## args);\
if (gsi_ctx) { \
GSI_IPC_LOGGING(gsi_ctx->ipc_logbuf, \
"%s:%d " fmt, ## args); \
GSI_IPC_LOGGING(gsi_ctx->ipc_logbuf_low, \
"%s:%d " fmt, ## args); \
} \
} while (0)
#define GSI_IPC_LOG_PAGES 50
#define GSI_MAX_NUM_MSI 2
@@ -103,6 +115,7 @@ enum gsi_ver {
GSI_VER_2_11 = 9,
GSI_VER_3_0 = 10,
GSI_VER_5_5 = 11,
GSI_VER_6_0 = 12,
GSI_VER_MAX,
};
@@ -162,6 +175,7 @@ enum gsi_evt_chtype {
GSI_EVT_CHTYPE_11AD_EV = 0x9,
GSI_EVT_CHTYPE_RTK_EV = 0xC,
GSI_EVT_CHTYPE_NTN_EV = 0xD,
GSI_EVT_CHTYPE_WDI3_V2_EV = 0XF,
};
enum gsi_evt_ring_elem_size {
@@ -251,6 +265,7 @@ enum gsi_chan_prot {
GSI_CHAN_PROT_QDSS = 0xB,
GSI_CHAN_PROT_RTK = 0xC,
GSI_CHAN_PROT_NTN = 0xD,
GSI_CHAN_PROT_WDI3_V2 = 0XF,
};
enum gsi_max_prefetch {
@@ -942,6 +957,35 @@ struct __packed gsi_11ad_tx_channel_scratch {
uint32_t fixed_data_buffer_size_pow_2:16;
uint32_t resv2:8;
};
/**
* gsi_wdi3_hamilton_channel_scratch - WDI 3 protocol, hamilton chipset
* SW config area of channel scratch
*
* @wifi_rx_ri_addr_low: Low 32 bits of Transfer ring Read Index address.
* @wifi_rx_ri_addr_high: High 32 bits of Transer ring Read Index address.
* @update_ri_moderation_threshold: Threshold N for Transfer ring Read Index
N is the number of packets that IPA will
process before wifi transfer ring Ri will
be updated.
* @endp_metadata_reg_offset: Rx only, the offset of IPA_ENDP_INIT_HDR_METADATA_n
of the corresponding endpoint in 4B words from IPA
base address.
* @qmap_id: Rx only, used for setting metadata register in IPA, Read only field
for MCS, Write for SW
*/
struct __packed gsi_wdi3_v2_channel_scratch {
uint32_t wifi_rp_address_low;
uint32_t wifi_rp_address_high;
uint32_t update_rp_moderation_threshold : 5;
uint32_t qmap_id : 8;
uint32_t reserved1 : 3;
uint32_t endp_metadata_reg_offset : 16;
uint32_t rx_pkt_offset : 16;
uint32_t reserved2 : 6;
uint32_t bank_id : 6;
uint32_t reserved3: 4;
};
/**
* gsi_wdi3_channel_scratch - WDI protocol 3 SW config area of
@@ -1113,6 +1157,7 @@ union __packed gsi_channel_scratch {
struct __packed gsi_11ad_rx_channel_scratch rx_11ad;
struct __packed gsi_11ad_tx_channel_scratch tx_11ad;
struct __packed gsi_wdi3_channel_scratch wdi3;
struct __packed gsi_wdi3_v2_channel_scratch wdi3_v2;
struct __packed gsi_mhip_channel_scratch mhip;
struct __packed gsi_wdi2_channel_scratch_new wdi2_new;
struct __packed gsi_aqc_channel_scratch aqc;

16
drivers/platform/msm/gsi/gsihal/gsihal_reg.c
Ver fichero

@@ -746,23 +746,23 @@ static void gsireg_construct_ev_ch_k_cntxt_9(enum gsihal_reg_name reg,
static void gsireg_construct_ev_ch_k_cntxt_10(enum gsihal_reg_name reg,
const void *fields, u32 *val)
{
struct gsihal_reg_ev_ch_k_cntxt_10 *ctxt =
(struct gsihal_reg_ev_ch_k_cntxt_10 *)fields;
union gsihal_reg_ev_ch_k_cntxt_10 *ctxt =
(union gsihal_reg_ev_ch_k_cntxt_10 *)fields;
GSI_SETFIELD_IN_REG(*val, ctxt->msi_addr_lsb,
GSI_EE_n_EV_CH_k_CNTXT_10_MSI_ADDR_LSB_SHFT,
GSI_EE_n_EV_CH_k_CNTXT_10_MSI_ADDR_LSB_BMSK);
GSI_EE_n_EV_CH_k_CNTXT_10_ADDR_LSB_SHFT,
GSI_EE_n_EV_CH_k_CNTXT_10_ADDR_LSB_BMSK);
}
static void gsireg_construct_ev_ch_k_cntxt_11(enum gsihal_reg_name reg,
const void *fields, u32 *val)
{
struct gsihal_reg_ev_ch_k_cntxt_11 *ctxt =
(struct gsihal_reg_ev_ch_k_cntxt_11 *)fields;
union gsihal_reg_ev_ch_k_cntxt_11 *ctxt =
(union gsihal_reg_ev_ch_k_cntxt_11 *)fields;
GSI_SETFIELD_IN_REG(*val, ctxt->msi_addr_msb,
GSI_EE_n_EV_CH_k_CNTXT_11_MSI_ADDR_MSB_SHFT,
GSI_EE_n_EV_CH_k_CNTXT_11_MSI_ADDR_MSB_BMSK);
GSI_EE_n_EV_CH_k_CNTXT_11_ADDR_MSB_SHFT,
GSI_EE_n_EV_CH_k_CNTXT_11_ADDR_MSB_BMSK);
}
static void gsireg_construct_ev_ch_k_cntxt_12(enum gsihal_reg_name reg,

6
drivers/platform/msm/gsi/gsihal/gsihal_reg.h
Ver fichero

@@ -264,12 +264,14 @@ struct gsihal_reg_ev_ch_k_cntxt_9 {
uint32_t intvec;
};
struct gsihal_reg_ev_ch_k_cntxt_10 {
union gsihal_reg_ev_ch_k_cntxt_10 {
uint32_t msi_addr_lsb;
uint32_t rp_addr_lsb;
};
struct gsihal_reg_ev_ch_k_cntxt_11 {
union gsihal_reg_ev_ch_k_cntxt_11 {
uint32_t msi_addr_msb;
uint32_t rp_addr_msb;
};
struct gsihal_reg_ev_ch_k_cntxt_12 {

8
drivers/platform/msm/gsi/gsihal/gsihal_reg_i.h
Ver fichero

@@ -237,12 +237,12 @@
#define GSI_EE_n_EV_CH_k_CNTXT_9_INTVEC_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_10 */
#define GSI_EE_n_EV_CH_k_CNTXT_10_MSI_ADDR_LSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_10_MSI_ADDR_LSB_SHFT 0x0
#define GSI_EE_n_EV_CH_k_CNTXT_10_ADDR_LSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_10_ADDR_LSB_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_11 */
#define GSI_EE_n_EV_CH_k_CNTXT_11_MSI_ADDR_MSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_11_MSI_ADDR_MSB_SHFT 0x0
#define GSI_EE_n_EV_CH_k_CNTXT_11_ADDR_MSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_11_ADDR_MSB_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_12 */
#define GSI_EE_n_EV_CH_k_CNTXT_12_RP_UPDATE_ADDR_LSB_BMSK 0xffffffff

22
drivers/platform/msm/ipa/ipa_clients/ipa_wdi3.c
Ver fichero

@@ -208,7 +208,7 @@ static int ipa_wdi_init_per_inst_internal(struct ipa_wdi_init_in_params *in,
return -EINVAL;
}
if (in->wdi_version > IPA_WDI_3 || in->wdi_version < IPA_WDI_1) {
if (in->wdi_version > IPA_WDI_3_V2 || in->wdi_version < IPA_WDI_1) {
IPA_WDI_ERR("wrong wdi version: %d\n", in->wdi_version);
return -EFAULT;
}
@@ -255,7 +255,7 @@ static int ipa_wdi_init_per_inst_internal(struct ipa_wdi_init_in_params *in,
ipa_wdi_ctx_list[hdl]->is_smmu_enabled = out->is_smmu_enabled;
if (IPA_WDI2_OVER_GSI() || (in->wdi_version == IPA_WDI_3))
if (IPA_WDI2_OVER_GSI() || (in->wdi_version >= IPA_WDI_3))
out->is_over_gsi = true;
else
out->is_over_gsi = false;
@@ -400,7 +400,7 @@ static int ipa_wdi_reg_intf_per_inst_internal(
rx.prop = rx_prop;
memset(rx_prop, 0, sizeof(rx_prop));
rx_prop[0].ip = IPA_IP_v4;
if (ipa_wdi_ctx_list[in->hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[in->hdl]->wdi_version >= IPA_WDI_3) {
if (IPA_CLIENT_IS_WLAN0_INSTANCE(ipa_wdi_ctx_list[in->hdl]->inst_id))
rx_prop[0].src_pipe = IPA_CLIENT_WLAN2_PROD;
else
@@ -416,7 +416,7 @@ static int ipa_wdi_reg_intf_per_inst_internal(
}
rx_prop[1].ip = IPA_IP_v6;
if (ipa_wdi_ctx_list[in->hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[in->hdl]->wdi_version >= IPA_WDI_3) {
if (IPA_CLIENT_IS_WLAN0_INSTANCE(ipa_wdi_ctx_list[in->hdl]->inst_id))
rx_prop[1].src_pipe = IPA_CLIENT_WLAN2_PROD;
else
@@ -537,7 +537,7 @@ static int ipa_wdi_conn_pipes_per_inst_internal(struct ipa_wdi_conn_in_params *i
goto fail_setup_sys_pipe;
}
IPA_WDI_DBG("PM handle Registered\n");
if (ipa_wdi_ctx_list[in->hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[in->hdl]->wdi_version >= IPA_WDI_3) {
if (ipa3_conn_wdi3_pipes(in, out, ipa_wdi_ctx_list[in->hdl]->wdi_notify)) {
IPA_WDI_ERR("fail to setup wdi pipes\n");
ret = -EFAULT;
@@ -725,7 +725,7 @@ static int ipa_wdi_enable_pipes_per_inst_internal(ipa_wdi_hdl_t hdl)
return -EPERM;
}
if (ipa_wdi_ctx_list[hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[hdl]->wdi_version >= IPA_WDI_3) {
if (IPA_CLIENT_IS_WLAN0_INSTANCE(ipa_wdi_ctx_list[hdl]->inst_id)) {
ipa_ep_idx_rx = ipa_get_ep_mapping(IPA_CLIENT_WLAN2_PROD);
ipa_ep_idx_tx = ipa_get_ep_mapping(IPA_CLIENT_WLAN2_CONS);
@@ -749,7 +749,7 @@ static int ipa_wdi_enable_pipes_per_inst_internal(ipa_wdi_hdl_t hdl)
return -EFAULT;
}
IPA_WDI_DBG("Enable WDI pipes\n");
if (ipa_wdi_ctx_list[hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[hdl]->wdi_version >= IPA_WDI_3) {
if (ipa3_enable_wdi3_pipes(
ipa_ep_idx_tx, ipa_ep_idx_rx, ipa_ep_idx_tx1)) {
IPA_WDI_ERR("fail to enable wdi pipes\n");
@@ -1092,7 +1092,7 @@ static int ipa_wdi_disconn_pipes_per_inst_internal(ipa_wdi_hdl_t hdl)
}
}
if (ipa_wdi_ctx_list[hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[hdl]->wdi_version >= IPA_WDI_3) {
if (IPA_CLIENT_IS_WLAN0_INSTANCE(ipa_wdi_ctx_list[hdl]->inst_id)) {
ipa_ep_idx_rx = ipa_get_ep_mapping(IPA_CLIENT_WLAN2_PROD);
ipa_ep_idx_tx = ipa_get_ep_mapping(IPA_CLIENT_WLAN2_CONS);
@@ -1109,7 +1109,7 @@ static int ipa_wdi_disconn_pipes_per_inst_internal(ipa_wdi_hdl_t hdl)
ipa_ep_idx_tx = ipa_get_ep_mapping(IPA_CLIENT_WLAN1_CONS);
}
if (ipa_wdi_ctx_list[hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[hdl]->wdi_version >= IPA_WDI_3) {
if (ipa3_disconn_wdi3_pipes(
ipa_ep_idx_tx, ipa_ep_idx_rx, ipa_ep_idx_tx1)) {
IPA_WDI_ERR("fail to tear down wdi pipes\n");
@@ -1167,7 +1167,7 @@ static int ipa_wdi_disable_pipes_per_inst_internal(ipa_wdi_hdl_t hdl)
return -EPERM;
}
if (ipa_wdi_ctx_list[hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[hdl]->wdi_version >= IPA_WDI_3) {
if (IPA_CLIENT_IS_WLAN0_INSTANCE(ipa_wdi_ctx_list[hdl]->inst_id)) {
ipa_ep_idx_rx = ipa_get_ep_mapping(IPA_CLIENT_WLAN2_PROD);
ipa_ep_idx_tx = ipa_get_ep_mapping(IPA_CLIENT_WLAN2_CONS);
@@ -1184,7 +1184,7 @@ static int ipa_wdi_disable_pipes_per_inst_internal(ipa_wdi_hdl_t hdl)
ipa_ep_idx_tx = ipa_get_ep_mapping(IPA_CLIENT_WLAN1_CONS);
}
if (ipa_wdi_ctx_list[hdl]->wdi_version == IPA_WDI_3) {
if (ipa_wdi_ctx_list[hdl]->wdi_version >= IPA_WDI_3) {
if (ipa3_disable_wdi3_pipes(
ipa_ep_idx_tx, ipa_ep_idx_rx, ipa_ep_idx_tx1)) {
IPA_WDI_ERR("fail to disable wdi pipes\n");

4
drivers/platform/msm/ipa/ipa_common_i.h
Ver fichero

@@ -189,8 +189,8 @@ do {\
(x == ipa3_get_ep_mapping(IPA_CLIENT_AQC_ETHERNET_PROD)) || \
(x == ipa3_get_ep_mapping(IPA_CLIENT_RTK_ETHERNET_PROD)))
#define IPA_GSI_CHANNEL_STOP_SLEEP_MIN_USEC (3000)
#define IPA_GSI_CHANNEL_STOP_SLEEP_MAX_USEC (5000)
#define IPA_GSI_CHANNEL_STOP_SLEEP_MIN_USEC (1000)
#define IPA_GSI_CHANNEL_STOP_SLEEP_MAX_USEC (2000)
#define STR_ETH_IFACE "eth"
#define STR_ETH0_IFACE "eth0"

63
drivers/platform/msm/ipa/ipa_v3/ipa.c
Ver fichero

@@ -9109,6 +9109,25 @@ static struct notifier_block qcom_va_md_ipa_notif_blk = {
};
#endif
static u32 get_ipa_gen_rx_cmn_page_pool_size(u32 rx_cmn_page_pool_size)
{
if (!rx_cmn_page_pool_size)
return IPA_GENERIC_RX_CMN_PAGE_POOL_SZ_FACTOR;
if (rx_cmn_page_pool_size <= IPA_GENERIC_RX_CMN_PAGE_POOL_SZ_FACTOR)
return rx_cmn_page_pool_size;
return IPA_GENERIC_RX_CMN_PAGE_POOL_SZ_FACTOR;
}
static u32 get_ipa_gen_rx_cmn_temp_pool_size(u32 rx_cmn_temp_pool_size)
{
if (!rx_cmn_temp_pool_size)
return IPA_GENERIC_RX_CMN_TEMP_POOL_SZ_FACTOR;
if (rx_cmn_temp_pool_size <= IPA_GENERIC_RX_CMN_TEMP_POOL_SZ_FACTOR)
return rx_cmn_temp_pool_size;
return IPA_GENERIC_RX_CMN_TEMP_POOL_SZ_FACTOR;
}
/**
* ipa3_pre_init() - Initialize the IPA Driver.
* This part contains all initialization which doesn't require IPA HW, such
@@ -9262,6 +9281,10 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p,
ipa3_ctx->rmnet_ll_enable = resource_p->rmnet_ll_enable;
ipa3_ctx->tx_wrapper_cache_max_size = get_tx_wrapper_cache_size(
resource_p->tx_wrapper_cache_max_size);
ipa3_ctx->ipa_gen_rx_cmn_page_pool_sz_factor = get_ipa_gen_rx_cmn_page_pool_size(
resource_p->ipa_gen_rx_cmn_page_pool_sz_factor);
ipa3_ctx->ipa_gen_rx_cmn_temp_pool_sz_factor = get_ipa_gen_rx_cmn_temp_pool_size(
resource_p->ipa_gen_rx_cmn_temp_pool_sz_factor);
ipa3_ctx->ipa_config_is_auto = resource_p->ipa_config_is_auto;
ipa3_ctx->ipa_mhi_proxy = resource_p->ipa_mhi_proxy;
ipa3_ctx->max_num_smmu_cb = resource_p->max_num_smmu_cb;
@@ -10110,6 +10133,40 @@ static void get_dts_tx_wrapper_cache_size(struct platform_device *pdev,
ipa_drv_res->tx_wrapper_cache_max_size);
}
static void get_dts_ipa_gen_rx_cmn_page_pool_sz_factor(struct platform_device *pdev,
struct ipa3_plat_drv_res *ipa_drv_res)
{
int result;
result = of_property_read_u32 (
pdev->dev.of_node,
"qcom,ipa-gen-rx-cmn-page-pool-sz-factor",
&ipa_drv_res->ipa_gen_rx_cmn_page_pool_sz_factor);
if (result)
ipa_drv_res->ipa_gen_rx_cmn_page_pool_sz_factor = 0;
IPADBG("ipa_gen_rx_cmn_page_pool_sz_factor is set to %d",
ipa_drv_res->ipa_gen_rx_cmn_page_pool_sz_factor);
}
static void get_dts_ipa_gen_rx_cmn_temp_pool_sz_factor(struct platform_device *pdev,
struct ipa3_plat_drv_res *ipa_drv_res)
{
int result;
result = of_property_read_u32 (
pdev->dev.of_node,
"qcom,ipa-gen-rx-cmn-temp-pool-sz-factor",
&ipa_drv_res->ipa_gen_rx_cmn_temp_pool_sz_factor);
if (result)
ipa_drv_res->ipa_gen_rx_cmn_temp_pool_sz_factor = 0;
IPADBG("ipa_gen_rx_cmn_temp_pool_sz_factor is set to %d",
ipa_drv_res->ipa_gen_rx_cmn_temp_pool_sz_factor);
}
static void ipa_dts_get_ulso_data(struct platform_device *pdev,
struct ipa3_plat_drv_res *ipa_drv_res)
{
@@ -10832,6 +10889,10 @@ static int get_ipa_dts_configuration(struct platform_device *pdev,
get_dts_tx_wrapper_cache_size(pdev, ipa_drv_res);
get_dts_ipa_gen_rx_cmn_page_pool_sz_factor(pdev, ipa_drv_res);
get_dts_ipa_gen_rx_cmn_temp_pool_sz_factor(pdev, ipa_drv_res);
ipa_dts_get_ulso_data(pdev, ipa_drv_res);
result = of_property_read_u32(pdev->dev.of_node,
@@ -11975,7 +12036,7 @@ int ipa3_get_smmu_params(struct ipa_smmu_in_params *in,
switch (in->smmu_client) {
case IPA_SMMU_WLAN_CLIENT:
if (ipa_get_wdi_version() == IPA_WDI_3 ||
if (ipa_get_wdi_version() >= IPA_WDI_3 ||
IPA_WDI2_OVER_GSI())
is_smmu_enable =
!(ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP] ||

9
drivers/platform/msm/ipa/ipa_v3/ipa_client.c
Ver fichero

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <asm/barrier.h>
@@ -80,6 +81,14 @@ int ipa3_enable_data_path(u32 clnt_hdl)
ep->client == IPA_CLIENT_USB_CONS) {
holb_cfg.en = IPA_HOLB_TMR_EN;
holb_cfg.tmr_val = IPA_HOLB_TMR_VAL_4_5;
} else if ((ipa3_ctx->ipa_hw_type == IPA_HW_v4_5) &&
(ep->client == IPA_CLIENT_USB_CONS)) {
holb_cfg.tmr_val = IPA_HOLB_TMR_VAL_4_5;
holb_cfg.en = IPA_HOLB_TMR_EN;
} else if ((ipa3_ctx->ipa_hw_type >= IPA_HW_v5_2) &&
(ep->client == IPA_CLIENT_USB_CONS)) {
holb_cfg.tmr_val = IPA_HOLB_TMR_VAL_4_5;
holb_cfg.en = IPA_HOLB_TMR_EN;
} else {
holb_cfg.en = IPA_HOLB_TMR_DIS;
holb_cfg.tmr_val = 0;

13
drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
Ver fichero

@@ -1730,7 +1730,7 @@ int ipa3_setup_sys_pipe(struct ipa_sys_connect_params *sys_in, u32 *clnt_hdl)
sys_in->client == IPA_CLIENT_APPS_WAN_COAL_CONS)
ep->sys->page_recycle_repl->capacity =
(ep->sys->rx_pool_sz + 1) *
IPA_GENERIC_RX_CMN_PAGE_POOL_SZ_FACTOR;
ipa3_ctx->ipa_gen_rx_cmn_page_pool_sz_factor;
else
ep->sys->page_recycle_repl->capacity =
(ep->sys->rx_pool_sz + 1) *
@@ -1759,7 +1759,7 @@ int ipa3_setup_sys_pipe(struct ipa_sys_connect_params *sys_in, u32 *clnt_hdl)
if (ipa3_ctx->wan_common_page_pool &&
sys_in->client == IPA_CLIENT_APPS_WAN_COAL_CONS)
ep->sys->repl->capacity = (ep->sys->rx_pool_sz + 1) *
IPA_GENERIC_RX_CMN_TEMP_POOL_SZ_FACTOR;
ipa3_ctx->ipa_gen_rx_cmn_temp_pool_sz_factor;
else
ep->sys->repl->capacity = (ep->sys->rx_pool_sz + 1);
IPADBG("Repl capacity for client:%d, value:%d\n",
@@ -2481,7 +2481,7 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb,
}
if (num_frags == 0) {
if (ipa3_send(sys, data_idx + 1, desc, true)) {
IPAERR("fail to send skb %pK HWP\n", skb);
IPAERR_RL("fail to send skb %pK HWP\n", skb);
goto fail_mem;
}
} else {
@@ -2501,7 +2501,7 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb,
if (ipa3_send(sys, num_frags + data_idx + 1,
desc, true)) {
IPAERR("fail to send skb %pK num_frags %u\n",
IPAERR_RL("fail to send skb %pK num_frags %u\n",
skb, num_frags);
goto fail_mem;
}
@@ -5250,7 +5250,8 @@ static struct sk_buff *handle_skb_completion(
/* Check added for handling LAN consumer packet without EOT flag */
if (notify->evt_id == GSI_CHAN_EVT_EOT ||
sys->ep->client == IPA_CLIENT_APPS_LAN_CONS) {
sys->ep->client == IPA_CLIENT_APPS_LAN_CONS ||
sys->ep->client == IPA_CLIENT_APPS_LAN_COAL_CONS) {
/* go over the list backward to save computations on updating length */
list_for_each_entry_safe_reverse(rx_pkt, tmp, head, link) {
rx_skb = rx_pkt->data.skb;
@@ -6038,7 +6039,7 @@ int ipa3_tx_dp_mul(enum ipa_client_type src,
IPADBG_LOW("calling ipa3_send()\n");
if (ipa3_send(sys, 2, desc, true)) {
IPAERR("fail to send skb\n");
IPAERR_RL("fail to send skb\n");
sys->ep->wstats.rx_pkt_leak += (cnt-1);
sys->ep->wstats.rx_dp_fail++;
goto fail_send;

4
drivers/platform/msm/ipa/ipa_v3/ipa_hw_stats.c
Ver fichero

@@ -1161,7 +1161,7 @@ int ipa_get_teth_stats(void)
goto destroy_imm;
}
stats_all = kzalloc(sizeof(*stats_all), GFP_KERNEL);
stats_all = vmalloc(sizeof(*stats_all));
if (!stats_all) {
IPADBG("failed to alloc memory\n");
ret = -ENOMEM;
@@ -1248,7 +1248,7 @@ int ipa_get_teth_stats(void)
ret = 0;
free_stats:
kfree(stats_all);
vfree(stats_all);
stats = NULL;
destroy_imm:
for (i = 0; i < num_cmd; i++)

4
drivers/platform/msm/ipa/ipa_v3/ipa_i.h
Ver fichero

@@ -2526,6 +2526,8 @@ struct ipa3_context {
struct ipahal_imm_cmd_pyld *coal_cmd_pyld[MAX_CCP_SUB];
struct ipa_mem_buffer ulso_wa_cmd;
u32 tx_wrapper_cache_max_size;
u32 ipa_gen_rx_cmn_page_pool_sz_factor;
u32 ipa_gen_rx_cmn_temp_pool_sz_factor;
struct ipa3_app_clock_vote app_clock_vote;
bool clients_registered;
bool ipa_gpi_event_rp_ddr;
@@ -2660,6 +2662,8 @@ struct ipa3_plat_drv_res {
const char *gsi_fw_file_name;
const char *uc_fw_file_name;
u32 tx_wrapper_cache_max_size;
u32 ipa_gen_rx_cmn_page_pool_sz_factor;
u32 ipa_gen_rx_cmn_temp_pool_sz_factor;
u32 ipa_wan_aggr_pkt_cnt;
bool ipa_mhi_proxy;
u32 max_num_smmu_cb;

4
drivers/platform/msm/ipa/ipa_v3/ipa_uc_wdi.c
Ver fichero

@@ -740,14 +740,14 @@ static void ipa_release_ap_smmu_mappings(enum ipa_client_type client)
if (IPA_CLIENT_IS_CONS(client)) {
start = IPA_WDI_TX_RING_RES;
if (ipa_get_wdi_version() == IPA_WDI_3)
if (ipa_get_wdi_version() >= IPA_WDI_3)
end = IPA_WDI_TX_DB_RES;
else
end = IPA_WDI_CE_DB_RES;
} else {
start = IPA_WDI_RX_RING_RES;
if (ipa3_ctx->ipa_wdi2 ||
(ipa_get_wdi_version() == IPA_WDI_3))
(ipa_get_wdi_version() >= IPA_WDI_3))
end = IPA_WDI_RX_COMP_RING_WP_RES;
else
end = IPA_WDI_RX_RING_RP_RES;

2
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
Ver fichero

@@ -4180,7 +4180,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
[IPA_5_0][IPA_CLIENT_ODU_PROD] = {
true, IPA_v5_0_GROUP_UL,
true,
IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 7, 17, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 3 },
IPA_TX_INSTANCE_NA },

80
drivers/platform/msm/ipa/ipa_v3/ipa_wdi3_i.c
Ver fichero

@@ -13,6 +13,7 @@
#define IPA_WLAN_AGGR_BYTE_LIMIT 2 /*2 Kbytes Agger hard byte limit*/
#define IPA_WDI3_GSI_EVT_RING_INT_MODT 32
#define IPA_WDI3_MAX_VALUE_OF_BANK_ID 63
static void ipa3_wdi3_gsi_evt_ring_err_cb(struct gsi_evt_err_notify *notify)
{
@@ -80,9 +81,20 @@ static int ipa3_setup_wdi3_gsi_channel(u8 is_smmu_enabled,
IPAERR("invalid input\n");
return -EINVAL;
}
/* setup event ring */
memset(&gsi_evt_ring_props, 0, sizeof(gsi_evt_ring_props));
gsi_evt_ring_props.intf = GSI_EVT_CHTYPE_WDI3_EV;
memset(&gsi_channel_props, 0, sizeof(gsi_channel_props));
if(ipa_get_wdi_version() == IPA_WDI_3_V2) {
gsi_channel_props.prot = GSI_CHAN_PROT_WDI3_V2;
gsi_evt_ring_props.intf = GSI_EVT_CHTYPE_WDI3_V2_EV;
}
else {
gsi_channel_props.prot = GSI_CHAN_PROT_WDI3;
gsi_evt_ring_props.intf = GSI_EVT_CHTYPE_WDI3_EV;
}
/* setup event ring */
if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_9) {
gsi_evt_ring_props.intr = GSI_INTR_MSI;
/* 32 (for Tx) and 8 (for Rx) */
@@ -166,8 +178,6 @@ static int ipa3_setup_wdi3_gsi_channel(u8 is_smmu_enabled,
gsi_evt_ring_props.ring_base_addr;
/* setup channel ring */
memset(&gsi_channel_props, 0, sizeof(gsi_channel_props));
gsi_channel_props.prot = GSI_CHAN_PROT_WDI3;
if ((dir == IPA_WDI3_TX_DIR) || (dir == IPA_WDI3_TX1_DIR) ||
(dir == IPA_WDI3_TX2_DIR))
gsi_channel_props.dir = GSI_CHAN_DIR_FROM_GSI;
@@ -185,13 +195,19 @@ static int ipa3_setup_wdi3_gsi_channel(u8 is_smmu_enabled,
gsi_channel_props.db_in_bytes = 0;
gsi_channel_props.evt_ring_hdl = ep->gsi_evt_ring_hdl;
if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_9) {
/* 32 (for Tx) and 64 (for Rx) */
if ((dir == IPA_WDI3_TX_DIR) || (dir == IPA_WDI3_TX1_DIR) ||
(dir == IPA_WDI3_TX2_DIR))
gsi_channel_props.re_size = GSI_CHAN_RE_SIZE_32B;
else
gsi_channel_props.re_size = GSI_CHAN_RE_SIZE_64B;
else {
if (gsi_channel_props.prot == GSI_CHAN_PROT_WDI3_V2)
gsi_channel_props.re_size = GSI_CHAN_RE_SIZE_32B;
else
gsi_channel_props.re_size = GSI_CHAN_RE_SIZE_64B;
}
} else
gsi_channel_props.re_size = GSI_CHAN_RE_SIZE_16B;
@@ -519,6 +535,48 @@ static int ipa3_setup_wdi3_gsi_channel(u8 is_smmu_enabled,
(1 << 8));
}
if(ipa_get_wdi_version() == IPA_WDI_3_V2) {
ch_scratch.wdi3_v2.wifi_rp_address_high =
ch_scratch.wdi3.wifi_rp_address_high;
ch_scratch.wdi3_v2.wifi_rp_address_low =
ch_scratch.wdi3.wifi_rp_address_low;
ch_scratch.wdi3_v2.update_rp_moderation_threshold =
ch_scratch.wdi3.update_rp_moderation_threshold;
if ( dir == IPA_WDI3_RX_DIR) {
ch_scratch.wdi3_v2.rx_pkt_offset = ch_scratch.wdi3.rx_pkt_offset;
ch_scratch.wdi3_v2.endp_metadata_reg_offset =
ch_scratch.wdi3.endp_metadata_reg_offset;
} else {
if(is_smmu_enabled) {
if(info_smmu->rx_bank_id > IPA_WDI3_MAX_VALUE_OF_BANK_ID) {
IPAERR("Incorrect bank id value %d Exceeding the 6bit range\n", info_smmu->rx_bank_id);
goto fail_write_scratch;
}
ch_scratch.wdi3_v2.bank_id = info_smmu->rx_bank_id;
}
else {
if(info->rx_bank_id > IPA_WDI3_MAX_VALUE_OF_BANK_ID) {
IPAERR("Incorrect bank id value %d Exceeding the 6bit range\n", info->rx_bank_id);
goto fail_write_scratch;
}
ch_scratch.wdi3_v2.bank_id = info->rx_bank_id;
}
}
ch_scratch.wdi3_v2.qmap_id = 0;
ch_scratch.wdi3_v2.reserved1 = 0;
ch_scratch.wdi3_v2.reserved2 = 0;
}
result = gsi_write_channel_scratch(ep->gsi_chan_hdl, ch_scratch);
if (result != GSI_STATUS_SUCCESS) {
IPAERR("failed to write evt ring scratch\n");
@@ -557,7 +615,7 @@ int ipa3_conn_wdi3_pipes(struct ipa_wdi_conn_in_params *in,
u8 rx_dir, tx_dir;
/* wdi3 only support over gsi */
if (ipa_get_wdi_version() != IPA_WDI_3) {
if (ipa_get_wdi_version() < IPA_WDI_3) {
IPAERR("wdi3 over uc offload not supported");
WARN_ON(1);
return -EFAULT;
@@ -870,12 +928,12 @@ int ipa3_disconn_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx,
int ipa_ep_idx_tx1)
{
struct ipa3_ep_context *ep_tx, *ep_rx, *ep_tx1;
int result = 0;
enum ipa_client_type rx_client;
enum ipa_client_type tx_client;
int result = 0;
/* wdi3 only support over gsi */
if (ipa_get_wdi_version() != IPA_WDI_3) {
if (ipa_get_wdi_version() < IPA_WDI_3) {
IPAERR("wdi3 over uc offload not supported");
WARN_ON(1);
return -EFAULT;
@@ -988,7 +1046,7 @@ int ipa3_enable_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx,
u32 holb_max_cnt = ipa3_ctx->uc_ctx.holb_monitor.max_cnt_wlan;
/* wdi3 only support over gsi */
if (ipa_get_wdi_version() != IPA_WDI_3) {
if (ipa_get_wdi_version() < IPA_WDI_3) {
IPAERR("wdi3 over uc offload not supported");
WARN_ON(1);
return -EFAULT;
@@ -1133,7 +1191,7 @@ int ipa3_disable_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx,
struct ipahal_ep_cfg_ctrl_scnd ep_ctrl_scnd = { 0 };
/* wdi3 only support over gsi */
if (ipa_get_wdi_version() != IPA_WDI_3) {
if (ipa_get_wdi_version() < IPA_WDI_3) {
IPAERR("wdi3 over uc offload not supported");
WARN_ON(1);
return -EFAULT;

6
ipanat/Android.bp
Ver fichero

@@ -24,10 +24,6 @@ cc_library_shared {
vendor: true,
clang: true,
clang_cflags: [
"-DDEBUG",
"-DFEATURE_IPA_ANDROID",
"-Wno-int-conversion",
],
cflags: ["-DDEBUG"] + ["-DFEATURE_IPA_ANDROID"] + ["-Wno-int-conversion"],
}

6
kernel-tests/Android.bp
Ver fichero

@@ -1,11 +1,7 @@
cc_binary {
name: "ipa-kernel-tests",
clang_cflags: [
"-Wno-missing-field-initializers",
"-Wno-int-to-pointer-cast",
"-Wno-int-conversion",
],
cflags: ["-Wno-missing-field-initializers"] + ["-Wno-int-to-pointer-cast"] + ["-Wno-int-conversion"],
header_libs: ["device_kernel_headers"]+["qti_kernel_headers"]+["qti_ipa_test_kernel_headers"],

2
kernel-tests/network_traffic/UlsoPacket.h
Ver fichero

@@ -205,7 +205,7 @@ public:
uint32_t seqNum = 0;
if(isSegmented()){
throw std::logic_error("A segmented packet cannot be segmented again!");
return vector<UlsoPacket>();
}
unsigned int segmentSize = mQmapHeader.mSegmentSize.to_ulong();
vector<vector<uint8_t>> payloads = segmentPayload(segmentSize, mPayload);

2
kernel-tests/network_traffic/bits_utils.h
Ver fichero

@@ -98,7 +98,7 @@ static vector<bool> bitsetToVector(const bitset<N>& bits){
vector<bool> outVec;
for(int i = N-1; i >= 0; i--){
outVect.push_back(bits[i]);
outVec.push_back(bits[i]);
}
return outVec;
}