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qcacmn: Scratch register read api for qca5332

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Add a new api to read tsf2 and tqm scratch register for qca5332.
The function to read these registers are different from that of qcn9224
since qca5332 is a AHB radio and reading register involves ioremap of
address range.

Change-Id: Ib05df2ddf528594ae67109f8bcb409424a4350a2
CRs-Fixed: 3331476
This commit is contained in:
Nandha Kishore Easwaran
2022-11-08 13:58:52 +05:30
committed by Madan Koyyalamudi
parent 45859216d6
commit ae55a446c6
5 changed files with 156 additions and 90 deletions
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76
hal/wifi3.0/hal_internal.h
View File

@@ -565,6 +565,82 @@ struct hal_srng_high_wm_info {
};
#endif
#define DEFAULT_TSF_ID 1
/**
* enum hal_scratch_reg_enum - Enum to indicate scratch register values
* @PMM_QTIMER_GLOBAL_OFFSET_LO_US - QTIMER GLOBAL OFFSET LOW
* @PMM_QTIMER_GLOBAL_OFFSET_HI_US - QTIMER GLOBAL OFFSET HIGH
* @PMM_MAC0_TSF1_OFFSET_LO_US - MAC0 TSF1 OFFSET LOW
* @PMM_MAC0_TSF1_OFFSET_HI_US - MAC0 TSF1 OFFSET HIGH
* @PMM_MAC0_TSF2_OFFSET_LO_US - MAC0 TSF2 OFFSET LOW
* @PMM_MAC0_TSF2_OFFSET_HI_US - MAC0 TSF2 OFFSET HIGH
* @PMM_MAC1_TSF1_OFFSET_LO_US - MAC1 TSF1 OFFSET LOW
* @PMM_MAC1_TSF1_OFFSET_HI_US - MAC1 TSF1 OFFSET HIGH
* @PMM_MAC1_TSF2_OFFSET_LO_US - MAC1 TSF2 OFFSET LOW
* @PMM_MAC1_TSF2_OFFSET_HI_US - MAC1 TSF2 OFFSET HIGH
* @PMM_MLO_OFFSET_LO_US - MLO OFFSET LOW
* @PMM_MLO_OFFSET_HI_US - MLO OFFSET HIGH
* @PMM_TQM_CLOCK_OFFSET_LO_US - TQM CLOCK OFFSET LOW
* @PMM_TQM_CLOCK_OFFSET_HI_US - TQM CLOCK OFFSET HIGH
* @PMM_Q6_CRASH_REASON - Q6 CRASH REASON
* @PMM_SCRATCH_TWT_OFFSET - TWT OFFSET
* @PMM_PMM_REG_MAX - Max PMM REG value
*/
enum hal_scratch_reg_enum {
PMM_QTIMER_GLOBAL_OFFSET_LO_US,
PMM_QTIMER_GLOBAL_OFFSET_HI_US,
PMM_MAC0_TSF1_OFFSET_LO_US,
PMM_MAC0_TSF1_OFFSET_HI_US,
PMM_MAC0_TSF2_OFFSET_LO_US,
PMM_MAC0_TSF2_OFFSET_HI_US,
PMM_MAC1_TSF1_OFFSET_LO_US,
PMM_MAC1_TSF1_OFFSET_HI_US,
PMM_MAC1_TSF2_OFFSET_LO_US,
PMM_MAC1_TSF2_OFFSET_HI_US,
PMM_MLO_OFFSET_LO_US,
PMM_MLO_OFFSET_HI_US,
PMM_TQM_CLOCK_OFFSET_LO_US,
PMM_TQM_CLOCK_OFFSET_HI_US,
PMM_Q6_CRASH_REASON,
PMM_SCRATCH_TWT_OFFSET,
PMM_PMM_REG_MAX
};
/**
* hal_get_tsf_enum(): API to get the enum corresponding to the mac and tsf id
*
* @tsf_id: tsf id
* @mac_id: mac id
* @enum_lo: Pointer to update low scratch register
* @enum_hi: Pointer to update hi scratch register
*
* Return: void
*/
static inline void
hal_get_tsf_enum(uint32_t tsf_id, uint32_t mac_id,
enum hal_scratch_reg_enum *tsf_enum_low,
enum hal_scratch_reg_enum *tsf_enum_hi)
{
if (mac_id == 0) {
if (tsf_id == 0) {
*tsf_enum_low = PMM_MAC0_TSF1_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC0_TSF1_OFFSET_HI_US;
} else if (tsf_id == 1) {
*tsf_enum_low = PMM_MAC0_TSF2_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC0_TSF2_OFFSET_HI_US;
}
} else if (mac_id == 1) {
if (tsf_id == 0) {
*tsf_enum_low = PMM_MAC1_TSF1_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC1_TSF1_OFFSET_HI_US;
} else if (tsf_id == 1) {
*tsf_enum_low = PMM_MAC1_TSF2_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC1_TSF2_OFFSET_HI_US;
}
}
}
/* Common SRNG ring structure for source and destination rings */
struct hal_srng {
/* Unique SRNG ring ID */

45
hal/wifi3.0/kiwi/hal_kiwi.c
View File

@@ -133,27 +133,6 @@
#define PMM_REG_BASE 0xB500FC
#define FW_QTIME_CYCLES_PER_10_USEC 192
/* enum to indicate which scratch registers hold which value*/
/* Obtain from pcie_reg_scratch.h? */
enum hal_scratch_reg_enum {
PMM_QTIMER_GLOBAL_OFFSET_LO_US,
PMM_QTIMER_GLOBAL_OFFSET_HI_US,
PMM_MAC0_TSF1_OFFSET_LO_US,
PMM_MAC0_TSF1_OFFSET_HI_US,
PMM_MAC0_TSF2_OFFSET_LO_US,
PMM_MAC0_TSF2_OFFSET_HI_US,
PMM_MAC1_TSF1_OFFSET_LO_US,
PMM_MAC1_TSF1_OFFSET_HI_US,
PMM_MAC1_TSF2_OFFSET_LO_US,
PMM_MAC1_TSF2_OFFSET_HI_US,
PMM_MLO_OFFSET_LO_US,
PMM_MLO_OFFSET_HI_US,
PMM_TQM_CLOCK_OFFSET_LO_US,
PMM_TQM_CLOCK_OFFSET_HI_US,
PMM_Q6_CRASH_REASON,
PMM_PMM_REG_MAX
};
#endif
static uint32_t hal_get_link_desc_size_kiwi(void)
@@ -1925,30 +1904,6 @@ static uint32_t hal_get_reo_qdesc_size_kiwi(uint32_t ba_window_size, int tid)
}
#ifdef QCA_GET_TSF_VIA_REG
static inline void
hal_get_tsf_enum(uint32_t tsf_id, uint32_t mac_id,
enum hal_scratch_reg_enum *tsf_enum_low,
enum hal_scratch_reg_enum *tsf_enum_hi)
{
if (mac_id == 0) {
if (tsf_id == 0) {
*tsf_enum_low = PMM_MAC0_TSF1_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC0_TSF1_OFFSET_HI_US;
} else if (tsf_id == 1) {
*tsf_enum_low = PMM_MAC0_TSF2_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC0_TSF2_OFFSET_HI_US;
}
} else if (mac_id == 1) {
if (tsf_id == 0) {
*tsf_enum_low = PMM_MAC1_TSF1_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC1_TSF1_OFFSET_HI_US;
} else if (tsf_id == 1) {
*tsf_enum_low = PMM_MAC1_TSF2_OFFSET_LO_US;
*tsf_enum_hi = PMM_MAC1_TSF2_OFFSET_HI_US;
}
}
}
static inline uint32_t
hal_tsf_read_scratch_reg(struct hal_soc *soc,
enum hal_scratch_reg_enum reg_enum)

78
hal/wifi3.0/qca5332/hal_5332.c
View File

@@ -110,6 +110,80 @@
#include "hal_be_rx_tlv.h"
#include <hal_be_generic_api.h>
#define PMM_SCRATCH_BASE_QCA5332 0xCB500FC
#define PMM_SCRATCH_SIZE 0x100
/**
* hal_read_pmm_scratch_reg_5332(): API to read PMM Scratch register
*
* @soc: HAL soc
* @reg_enum: Enum of the scratch register
*
* Return: uint32_t
*/
static inline
uint32_t hal_read_pmm_scratch_reg_5332(struct hal_soc *soc,
enum hal_scratch_reg_enum reg_enum)
{
uint32_t val = 0;
void __iomem *bar;
bar = ioremap_nocache(PMM_SCRATCH_BASE_QCA5332, PMM_SCRATCH_SIZE);
pld_reg_read(soc->qdf_dev->dev, (reg_enum * 4), &val, bar);
iounmap(bar);
return val;
}
/**
* hal_get_tsf2_scratch_reg_qca5332(): API to read tsf2 scratch register
*
* @hal_soc_hdl: HAL soc context
* @mac_id: mac id
* @value: Pointer to update tsf2 value
*
* Return: void
*/
static void hal_get_tsf2_scratch_reg_qca5332(hal_soc_handle_t hal_soc_hdl,
uint8_t mac_id, uint64_t *value)
{
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
uint32_t offset_lo, offset_hi;
enum hal_scratch_reg_enum enum_lo, enum_hi;
hal_get_tsf_enum(DEFAULT_TSF_ID, mac_id, &enum_lo, &enum_hi);
offset_lo = hal_read_pmm_scratch_reg_5332(soc,
enum_lo);
offset_hi = hal_read_pmm_scratch_reg_5332(soc,
enum_hi);
*value = ((uint64_t)(offset_hi) << 32 | offset_lo);
}
/**
* hal_get_tqm_scratch_reg_qca5332(): API to read tqm scratch register
*
* @hal_soc_hdl: HAL soc context
* @value: Pointer to update tqm value
*
* Return: void
*/
static void hal_get_tqm_scratch_reg_qca5332(hal_soc_handle_t hal_soc_hdl,
uint64_t *value)
{
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
uint32_t offset_lo, offset_hi;
offset_lo = hal_read_pmm_scratch_reg_5332(soc,
PMM_TQM_CLOCK_OFFSET_LO_US);
offset_hi = hal_read_pmm_scratch_reg_5332(soc,
PMM_TQM_CLOCK_OFFSET_HI_US);
*value = ((uint64_t)(offset_hi) << 32 | offset_lo);
}
#define LINK_DESC_SIZE (NUM_OF_DWORDS_RX_MSDU_LINK << 2)
#define HAL_PPE_VP_ENTRIES_MAX 32
/**
@@ -1519,6 +1593,10 @@ static void hal_hw_txrx_ops_attach_qca5332(struct hal_soc *hal_soc)
hal_tx_populate_bank_register_be;
hal_soc->ops->hal_tx_vdev_mcast_ctrl_set =
hal_tx_vdev_mcast_ctrl_set_be;
hal_soc->ops->hal_get_tsf2_scratch_reg =
hal_get_tsf2_scratch_reg_qca5332;
hal_soc->ops->hal_get_tqm_scratch_reg =
hal_get_tqm_scratch_reg_qca5332;
};
struct hal_hw_srng_config hw_srng_table_5332[] = {

45
hal/wifi3.0/qcn9224/hal_9224.h
View File

@@ -138,26 +138,6 @@
#define PMM_REG_BASE_QCN9224 0xB500F8
/* Enum to indicate which scratch registers hold which value */
enum hal_scratch_reg_enum {
PMM_QTIMER_GLOBAL_OFFSET_LO_US,
PMM_QTIMER_GLOBAL_OFFSET_HI_US,
PMM_MAC0_TSF1_OFFSET_LO_US,
PMM_MAC0_TSF1_OFFSET_HI_US,
PMM_MAC0_TSF2_OFFSET_LO_US,
PMM_MAC0_TSF2_OFFSET_HI_US,
PMM_MAC1_TSF1_OFFSET_LO_US,
PMM_MAC1_TSF1_OFFSET_HI_US,
PMM_MAC1_TSF2_OFFSET_LO_US,
PMM_MAC1_TSF2_OFFSET_HI_US,
PMM_MLO_OFFSET_LO_US,
PMM_MLO_OFFSET_HI_US,
PMM_TQM_CLOCK_OFFSET_LO_US,
PMM_TQM_CLOCK_OFFSET_HI_US,
PMM_Q6_CRASH_REASON,
PMM_PMM_REG_MAX
};
/**
* hal_read_pmm_scratch_reg(): API to read PMM Scratch register
*
@@ -178,29 +158,6 @@ uint32_t hal_read_pmm_scratch_reg(struct hal_soc *soc,
return val;
}
/**
* hal_get_tsf2_enum(): API to get the enum corresponding to the mac id
*
* @mac_id: mac id
* @enum_lo: Pointer to update low scratch register
* @enum_hi: Pointer to update hi scratch register
*
* Return: void
*/
static inline
void hal_get_tsf2_enum(uint8_t mac_id,
enum hal_scratch_reg_enum *enum_lo,
enum hal_scratch_reg_enum *enum_hi)
{
if (mac_id == 1) {
*enum_lo = PMM_MAC1_TSF2_OFFSET_LO_US;
*enum_hi = PMM_MAC1_TSF2_OFFSET_HI_US;
} else {
*enum_lo = PMM_MAC0_TSF2_OFFSET_LO_US;
*enum_hi = PMM_MAC0_TSF2_OFFSET_HI_US;
}
}
/**
* hal_get_tsf2_scratch_reg_qcn9224(): API to read tsf2 scratch register
*
@@ -217,7 +174,7 @@ static void hal_get_tsf2_scratch_reg_qcn9224(hal_soc_handle_t hal_soc_hdl,
uint32_t offset_lo, offset_hi;
enum hal_scratch_reg_enum enum_lo, enum_hi;
hal_get_tsf2_enum(mac_id, &enum_lo, &enum_hi);
hal_get_tsf_enum(DEFAULT_TSF_ID, mac_id, &enum_lo, &enum_hi);
offset_lo = hal_read_pmm_scratch_reg(soc,
PMM_REG_BASE_QCN9224,

2
hal/wifi3.0/qcn9224/v2/hal_9224v2.c
View File

@@ -579,7 +579,7 @@ static void hal_get_tsf2_scratch_reg_qcn9224_v2(hal_soc_handle_t hal_soc_hdl,
uint32_t offset_lo, offset_hi;
enum hal_scratch_reg_enum enum_lo, enum_hi;
hal_get_tsf2_enum(mac_id, &enum_lo, &enum_hi);
hal_get_tsf_enum(DEFAULT_TSF_ID, mac_id, &enum_lo, &enum_hi);
offset_lo = hal_read_pmm_scratch_reg(soc,
PMM_REG_BASE_QCN9224_V2,