diff --git a/dp/inc/cdp_txrx_stats_struct.h b/dp/inc/cdp_txrx_stats_struct.h
index 5b4385e9c0..d669b8b81d 100644
--- a/dp/inc/cdp_txrx_stats_struct.h
+++ b/dp/inc/cdp_txrx_stats_struct.h
@@ -190,7 +190,11 @@
 #define CDP_SNR_UPDATE_AVG(x, y) x = CDP_SNR_AVG((x), CDP_SNR_IN((y)))
 
 /*Max SU EVM count */
+#ifdef QCA_MONITOR_2_0_SUPPORT
+#define DP_RX_MAX_SU_EVM_COUNT 256
+#else
 #define DP_RX_MAX_SU_EVM_COUNT 32
+#endif
 
 #define WDI_EVENT_BASE 0x100
 
diff --git a/dp/wifi3.0/monitor/dp_rx_mon.c b/dp/wifi3.0/monitor/dp_rx_mon.c
index b3d7f0a241..f0e2b219dc 100644
--- a/dp/wifi3.0/monitor/dp_rx_mon.c
+++ b/dp/wifi3.0/monitor/dp_rx_mon.c
@@ -348,9 +348,9 @@ void
 dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
 			      struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
 {
-	uint8_t pilot_evm;
-	uint8_t nss_count;
-	uint8_t pilot_count;
+	uint16_t pilot_evm;
+	uint16_t nss_count;
+	uint16_t pilot_count;
 
 	nss_count = ppdu_info->evm_info.nss_count;
 	pilot_count = ppdu_info->evm_info.pilot_count;
diff --git a/hal/wifi3.0/hal_api_mon.h b/hal/wifi3.0/hal_api_mon.h
index 6fe1db8360..def2709117 100644
--- a/hal/wifi3.0/hal_api_mon.h
+++ b/hal/wifi3.0/hal_api_mon.h
@@ -191,7 +191,11 @@
 #define HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER 16
 
 /* Max pilot count */
+#ifdef QCA_MONITOR_2_0_SUPPORT
+#define HAL_RX_MAX_SU_EVM_COUNT 256
+#else
 #define HAL_RX_MAX_SU_EVM_COUNT 32
+#endif
 
 #define HAL_RX_FRAMECTRL_TYPE_MASK 0x0C
 #define HAL_RX_GET_FRAME_CTRL_TYPE(fc)\
diff --git a/hal/wifi3.0/qcn9224/hal_9224.h b/hal/wifi3.0/qcn9224/hal_9224.h
index 9f8d7b71db..97756e0de5 100644
--- a/hal/wifi3.0/qcn9224/hal_9224.h
+++ b/hal/wifi3.0/qcn9224/hal_9224.h
@@ -253,50 +253,64 @@ uint8_t hal_rx_wbm_err_msdu_continuation_get_9224(void *wbm_desc)
 }
 
 #if (defined(WLAN_SA_API_ENABLE)) && (defined(QCA_WIFI_QCA9574))
-#define HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, evm, pilot) \
-	(ppdu_info)->evm_info.pilot_evm[pilot] = HAL_RX_GET(rx_tlv, \
-				PHYRX_OTHER_RECEIVE_INFO, \
-				SU_EVM_DETAILS_##evm##_PILOT_##pilot##_EVM)
-
+#define HAL_RX_EVM_DEMF_SEGMENT_SIZE 128
+#define HAL_RX_EVM_DEMF_MAX_STREAMS 2
+#define HAL_RX_SU_EVM_MEMBER_LEN 4
 static inline void
 hal_rx_update_su_evm_info(void *rx_tlv,
 			  void *ppdu_info_hdl)
 {
+	uint32_t nss_count, pilot_count;
+	uint16_t istream = 0, ipilot = 0;
+	uint8_t pilot_shift = 0;
+	uint8_t *pilot_ptr = NULL;
+	uint16_t segment = 0;
+
 	struct hal_rx_ppdu_info *ppdu_info =
 			(struct hal_rx_ppdu_info *)ppdu_info_hdl;
+	nss_count = ppdu_info->evm_info.nss_count;
+	pilot_count = ppdu_info->evm_info.pilot_count;
 
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 1, 0);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 2, 1);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 3, 2);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 4, 3);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 5, 4);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 6, 5);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 7, 6);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 8, 7);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 9, 8);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 10, 9);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 11, 10);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 12, 11);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 13, 12);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 14, 13);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 15, 14);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 16, 15);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 17, 16);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 18, 17);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 19, 18);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 20, 19);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 21, 20);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 22, 21);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 23, 22);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 24, 23);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 25, 24);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 26, 25);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 27, 26);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 28, 27);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 29, 28);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 30, 29);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 31, 30);
-	HAL_RX_UPDATE_SU_EVM_INFO(rx_tlv, ppdu_info, 32, 31);
+	if (nss_count * pilot_count > HAL_RX_MAX_SU_EVM_COUNT)
+		return;
+
+	/* move rx_tlv by 4 to skip no_of_data_sym, nss_cnt and pilot_cnt */
+	rx_tlv = (uint8_t *)rx_tlv + HAL_RX_SU_EVM_MEMBER_LEN;
+
+	/* EVM values = number_of_streams * number_of_pilots
+	 * each EVM value is 8 bits, So, each variable acc_linear_evm_x_y
+	 * is (32 bits) will contain 4 EVM values.
+	 * For ex:
+	 * acc_linear_evm_0_0 : <Pilot0, stream0>, <Pilot0, stream1>,
+	 * <Pilot1, stream0>, <Pilot1, stream1>
+	 * .....
+	 * acc_linear_evm_1_15 : <Pilot62, stream0>, <Pilot62, stream1>,
+	 * <Pilot63, stream0>, <Pilot63, stream1> ...
+	 */
+
+	for (istream = 0; istream < nss_count; istream++) {
+		segment = HAL_RX_EVM_DEMF_SEGMENT_SIZE * (istream / HAL_RX_EVM_DEMF_MAX_STREAMS);
+		pilot_ptr = (uint8_t *)rx_tlv + segment;
+		for (ipilot = 0; ipilot < pilot_count; ipilot++) {
+			/* In case there is one stream in Demf segment,
+			 * pilots are one after the other
+			 */
+			if (nss_count == 1 ||
+			    ((nss_count == HAL_RX_EVM_DEMF_MAX_STREAMS + 1) &&
+			     (istream == HAL_RX_EVM_DEMF_MAX_STREAMS)))
+				pilot_shift = ipilot;
+			/* In case there are more than one stream in DemF
+			 * segment, pilot 0 of all streams come one after the
+			 * other before pilot 1
+			 */
+			else
+				pilot_shift = (ipilot * HAL_RX_EVM_DEMF_MAX_STREAMS)
+				 + (istream % HAL_RX_EVM_DEMF_MAX_STREAMS);
+
+			ppdu_info->evm_info.pilot_evm[segment + pilot_shift] =
+					*(pilot_ptr + pilot_shift);
+		}
+	}
 }
 
 /**
@@ -310,11 +324,16 @@ static inline
 void hal_rx_proc_phyrx_other_receive_info_tlv_9224(void *rx_tlv_hdr,
 						   void *ppdu_info_hdl)
 {
-	uint32_t tlv_tag, tlv_len;
+	uint32_t tlv_len, tlv_tag;
 	void *rx_tlv;
 	struct hal_rx_ppdu_info *ppdu_info  = ppdu_info_hdl;
 
+	tlv_len = HAL_RX_GET_USER_TLV64_LEN(rx_tlv_hdr);
 	rx_tlv = (uint8_t *)rx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
+
+	if (!tlv_len)
+		return;
+
 	tlv_tag = HAL_RX_GET_USER_TLV64_TYPE(rx_tlv);
 	tlv_len = HAL_RX_GET_USER_TLV64_LEN(rx_tlv);
 
@@ -323,21 +342,24 @@ void hal_rx_proc_phyrx_other_receive_info_tlv_9224(void *rx_tlv_hdr,
 
 	switch (tlv_tag) {
 	case WIFIPHYRX_OTHER_RECEIVE_INFO_EVM_DETAILS_E:
-
 		/* Skip TLV length to get TLV content */
 		rx_tlv = (uint8_t *)rx_tlv + HAL_RX_TLV64_HDR_SIZE;
-
 		ppdu_info->evm_info.number_of_symbols = HAL_RX_GET(rx_tlv,
 				PHYRX_OTHER_RECEIVE_INFO,
-				SU_EVM_DETAILS_0_NUMBER_OF_SYMBOLS);
+				EVM_DETAILS_NUMBER_OF_DATA_SYM);
 		ppdu_info->evm_info.pilot_count = HAL_RX_GET(rx_tlv,
 				PHYRX_OTHER_RECEIVE_INFO,
-				SU_EVM_DETAILS_0_PILOT_COUNT);
+				EVM_DETAILS_NUMBER_OF_PILOTS);
 		ppdu_info->evm_info.nss_count = HAL_RX_GET(rx_tlv,
 				PHYRX_OTHER_RECEIVE_INFO,
-				SU_EVM_DETAILS_0_NSS_COUNT);
+				EVM_DETAILS_NUMBER_OF_STREAMS);
 		hal_rx_update_su_evm_info(rx_tlv, ppdu_info_hdl);
 		break;
+	default:
+		QDF_TRACE(QDF_MODULE_ID_HAL, QDF_TRACE_LEVEL_DEBUG,
+			  "%s unhandled TLV type: %d, TLV len:%d",
+			  __func__, tlv_tag, tlv_len);
+		break;
 	}
 }
 
diff --git a/hal/wifi3.0/qcn9224/hal_9224_rx.h b/hal/wifi3.0/qcn9224/hal_9224_rx.h
index 7c35b79005..827ac3e6da 100644
--- a/hal/wifi3.0/qcn9224/hal_9224_rx.h
+++ b/hal/wifi3.0/qcn9224/hal_9224_rx.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -38,7 +38,7 @@
 #include "hal_api_mon.h"
 #include "phyrx_other_receive_info_ru_details.h"
 #if (defined(WLAN_SA_API_ENABLE)) && (defined(QCA_WIFI_QCA9574))
-#include "phyrx_other_receive_info_su_evm_details.h"
+#include "phyrx_other_receive_info_evm_details.h"
 #endif /* WLAN_SA_API_ENABLE && QCA_WIFI_QCA9574 */
 
 #define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va)	\