qcacmn: Avoid asserts in dp related to HW interactions
Avoid asserts in data path which related to HW interactions and instead use work arounds. Change-Id: I86089d21c5be23784f8a077b085f3f3b8a2308e4 CRs-Fixed: 3564940
这个提交包含在:
@@ -100,6 +100,31 @@ static void dp_ppeds_rings_status(struct dp_soc *soc)
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WBM2SW_RELEASE);
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}
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#ifdef GLOBAL_ASSERT_AVOIDANCE
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void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
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{
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DP_PRINT_STATS("PPE-DS Tx WAR stats: [%u] [%u] [%u]",
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be_soc->ppeds_stats.tx.tx_comp_buf_src,
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be_soc->ppeds_stats.tx.tx_comp_desc_null,
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be_soc->ppeds_stats.tx.tx_comp_invalid_flag);
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}
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static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
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{
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be_soc->ppeds_stats.tx.tx_comp_buf_src = 0;
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be_soc->ppeds_stats.tx.tx_comp_desc_null = 0;
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be_soc->ppeds_stats.tx.tx_comp_invalid_flag = 0;
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}
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#else
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static void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
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{
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}
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static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
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{
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}
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#endif
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static void dp_ppeds_inuse_desc(struct dp_soc *soc)
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{
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struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
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@@ -110,6 +135,8 @@ static void dp_ppeds_inuse_desc(struct dp_soc *soc)
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DP_PRINT_STATS("PPE-DS Tx desc alloc failed %u",
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be_soc->ppeds_stats.tx.desc_alloc_failed);
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dp_ppeds_print_assert_war_stats(be_soc);
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}
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static void dp_ppeds_clear_stats(struct dp_soc *soc)
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@@ -117,6 +144,7 @@ static void dp_ppeds_clear_stats(struct dp_soc *soc)
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struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
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be_soc->ppeds_stats.tx.desc_alloc_failed = 0;
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dp_ppeds_clear_assert_war_stats(be_soc);
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}
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static void dp_ppeds_rings_stats(struct dp_soc *soc)
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@@ -3329,7 +3357,6 @@ void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
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arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
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dp_wbm_get_rx_desc_from_hal_desc_be;
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arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_be;
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arch_ops->dp_rx_chain_msdus = dp_rx_chain_msdus_be;
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arch_ops->dp_rx_wbm_err_reap_desc = dp_rx_wbm_err_reap_desc_be;
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arch_ops->dp_rx_null_q_desc_handle = dp_rx_null_q_desc_handle_be;
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#endif
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@@ -354,6 +354,11 @@ struct dp_soc_be {
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struct {
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struct {
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uint64_t desc_alloc_failed;
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#ifdef GLOBAL_ASSERT_AVOIDANCE
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uint32_t tx_comp_buf_src;
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uint32_t tx_comp_desc_null;
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uint32_t tx_comp_invalid_flag;
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#endif
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} tx;
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} ppeds_stats;
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#endif
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@@ -1366,6 +1366,11 @@ dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
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&dest_chip_id,
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&dest_chip_pmac_id);
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if (dp_assert_always_internal_stat(
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(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1)),
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&be_soc->soc, rx.err.intra_bss_bad_chipid))
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return false;
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params->dest_soc =
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dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
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dest_chip_id);
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@@ -1384,8 +1389,6 @@ dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
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dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
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}
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qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
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if (dest_chip_id == be_soc->mlo_chip_id) {
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if (dest_chip_pmac_id == ta_peer->vdev->pdev->pdev_id)
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params->tx_vdev_id = ta_peer->vdev->vdev_id;
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@@ -1424,7 +1427,11 @@ dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
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return false;
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dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
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qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
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if (dp_assert_always_internal_stat(
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(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1)),
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&be_soc->soc, rx.err.intra_bss_bad_chipid))
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return false;
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da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
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/* use dest chip id when TA is MLD peer and DA is legacy */
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@@ -1728,75 +1735,6 @@ bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
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}
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#endif
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bool dp_rx_chain_msdus_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
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uint8_t *rx_tlv_hdr, uint8_t mac_id)
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{
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bool mpdu_done = false;
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qdf_nbuf_t curr_nbuf = NULL;
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qdf_nbuf_t tmp_nbuf = NULL;
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struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
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if (!dp_pdev) {
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dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
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return mpdu_done;
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}
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/* if invalid peer SG list has max values free the buffers in list
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* and treat current buffer as start of list
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*
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* current logic to detect the last buffer from attn_tlv is not reliable
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* in OFDMA UL scenario hence add max buffers check to avoid list pile
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* up
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*/
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if (!dp_pdev->first_nbuf ||
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(dp_pdev->invalid_peer_head_msdu &&
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QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
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(dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
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qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
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dp_pdev->first_nbuf = true;
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/* If the new nbuf received is the first msdu of the
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* amsdu and there are msdus in the invalid peer msdu
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* list, then let us free all the msdus of the invalid
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* peer msdu list.
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* This scenario can happen when we start receiving
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* new a-msdu even before the previous a-msdu is completely
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* received.
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*/
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curr_nbuf = dp_pdev->invalid_peer_head_msdu;
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while (curr_nbuf) {
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tmp_nbuf = curr_nbuf->next;
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dp_rx_nbuf_free(curr_nbuf);
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curr_nbuf = tmp_nbuf;
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}
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dp_pdev->invalid_peer_head_msdu = NULL;
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dp_pdev->invalid_peer_tail_msdu = NULL;
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dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
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}
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if (qdf_nbuf_is_rx_chfrag_end(nbuf) &&
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hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
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qdf_assert_always(dp_pdev->first_nbuf);
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dp_pdev->first_nbuf = false;
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mpdu_done = true;
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}
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/*
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* For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
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* should be NULL here, add the checking for debugging purpose
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* in case some corner case.
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*/
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DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
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dp_pdev->invalid_peer_tail_msdu);
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DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
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dp_pdev->invalid_peer_tail_msdu,
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nbuf);
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return mpdu_done;
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}
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qdf_nbuf_t
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dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
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hal_ring_handle_t hal_ring_hdl, uint32_t quota,
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@@ -1852,7 +1790,9 @@ dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
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continue;
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}
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qdf_assert_always(rx_desc);
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if (dp_assert_always_internal_stat(rx_desc, soc,
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rx.err.rx_desc_null))
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continue;
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if (!dp_rx_desc_check_magic(rx_desc)) {
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dp_rx_err_err("%pK: Invalid rx_desc %pK",
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@@ -1906,8 +1846,11 @@ dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
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/*
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* For WBM ring, expect only MSDU buffers
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*/
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qdf_assert_always(wbm_err.info_bit.buffer_or_desc_type ==
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HAL_RX_WBM_BUF_TYPE_REL_BUF);
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if (dp_assert_always_internal_stat(
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wbm_err.info_bit.buffer_or_desc_type ==
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HAL_RX_WBM_BUF_TYPE_REL_BUF,
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soc, rx.err.wbm_err_buf_rel_type))
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continue;
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/*
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* Errors are handled only if the source is RXDMA or REO
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*/
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@@ -2097,7 +2040,6 @@ dp_rx_null_q_desc_handle_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
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/* Set length in nbuf */
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qdf_nbuf_set_pktlen(
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nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
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qdf_assert_always(nbuf->data == rx_tlv_hdr);
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}
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/*
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@@ -2138,15 +2080,6 @@ dp_rx_null_q_desc_handle_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
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nbuf,
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mpdu_done,
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pool_id);
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} else {
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mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
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rx_tlv_hdr,
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pool_id);
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/* Trigger invalid peer handler wrapper */
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dp_rx_process_invalid_peer_wrapper(
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soc,
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pdev->invalid_peer_head_msdu,
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mpdu_done, pool_id);
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}
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if (mpdu_done) {
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@@ -26,6 +26,7 @@
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#include <hal_be_api.h>
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#include <hal_be_tx.h>
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#include <dp_htt.h>
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#include "dp_internal.h"
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#ifdef FEATURE_WDS
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#include "dp_txrx_wds.h"
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#endif
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@@ -219,7 +220,7 @@ void dp_tx_process_mec_notify_be(struct dp_soc *soc, uint8_t *status)
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uint8_t vdev_id;
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uint32_t *htt_desc = (uint32_t *)status;
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qdf_assert_always(!soc->mec_fw_offload);
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dp_assert_always_internal(soc->mec_fw_offload);
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/*
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* Get vdev id from HTT status word in case of MEC
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@@ -1079,7 +1080,9 @@ int dp_ppeds_tx_comp_handler(struct dp_soc_be *be_soc, uint32_t quota)
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buf_src != HAL_TX_COMP_RELEASE_SOURCE_FW)) {
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dp_err("Tx comp release_src != TQM | FW but from %d",
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buf_src);
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qdf_assert_always(0);
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dp_assert_always_internal_ds_stat(0, be_soc,
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tx.tx_comp_buf_src);
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continue;
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}
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dp_tx_comp_get_params_from_hal_desc_be(soc, tx_comp_hal_desc,
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@@ -1087,14 +1090,16 @@ int dp_ppeds_tx_comp_handler(struct dp_soc_be *be_soc, uint32_t quota)
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if (!tx_desc) {
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dp_err("unable to retrieve tx_desc!");
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qdf_assert_always(0);
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dp_assert_always_internal_ds_stat(0, be_soc,
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tx.tx_comp_desc_null);
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continue;
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}
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if (qdf_unlikely(!(tx_desc->flags &
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DP_TX_DESC_FLAG_ALLOCATED) ||
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!(tx_desc->flags & DP_TX_DESC_FLAG_PPEDS))) {
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qdf_assert_always(0);
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dp_assert_always_internal_ds_stat(0, be_soc,
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tx.tx_comp_invalid_flag);
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continue;
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}
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@@ -1423,7 +1428,7 @@ QDF_STATUS dp_tx_init_bank_profiles(struct dp_soc_be *be_soc)
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num_tcl_banks = hal_tx_get_num_tcl_banks(be_soc->soc.hal_soc);
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qdf_assert_always(num_tcl_banks);
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dp_assert_always_internal(num_tcl_banks);
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be_soc->num_bank_profiles = num_tcl_banks;
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be_soc->bank_profiles = qdf_mem_malloc(num_tcl_banks *
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@@ -3477,20 +3477,20 @@ dp_rx_mlo_timestamp_ind_handler(struct dp_soc *soc,
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static void dp_htt_mlo_peer_map_handler(struct htt_soc *soc,
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uint32_t *msg_word)
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{
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qdf_assert_always(0);
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dp_alert("Unexpected event");
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}
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static void dp_htt_mlo_peer_unmap_handler(struct htt_soc *soc,
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uint32_t *msg_word)
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{
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qdf_assert_always(0);
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dp_alert("Unexpected event");
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}
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static void
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dp_rx_mlo_timestamp_ind_handler(void *soc_handle,
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uint32_t *msg_word)
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{
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qdf_assert_always(0);
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dp_alert("Unexpected event");
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}
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static void dp_htt_t2h_primary_link_migration(struct htt_soc *soc,
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@@ -201,6 +201,34 @@ static const enum cdp_packet_type hal_2_dp_pkt_type_map[HAL_DOT11_MAX] = {
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[HAL_DOT11N_GF] = DOT11_MAX,
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};
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#ifdef GLOBAL_ASSERT_AVOIDANCE
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#define dp_assert_always_internal_stat(_expr, _handle, _field) \
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(qdf_unlikely(!(_expr)) ? ((_handle)->stats._field++, true) : false)
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#define dp_assert_always_internal_ds_stat(_expr, _handle, _field) \
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((_handle)->ppeds_stats._field++)
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static inline bool dp_assert_always_internal(bool expr)
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{
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return !expr;
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}
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#else
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static inline bool __dp_assert_always_internal(bool expr)
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{
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qdf_assert_always(expr);
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return false;
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}
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#define dp_assert_always_internal(_expr) __dp_assert_always_internal(_expr)
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#define dp_assert_always_internal_stat(_expr, _handle, _field) \
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dp_assert_always_internal(_expr)
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#define dp_assert_always_internal_ds_stat(_expr, _handle, _field) \
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dp_assert_always_internal(_expr)
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#endif
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#ifdef WLAN_FEATURE_11BE
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/**
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* dp_get_mcs_array_index_by_pkt_type_mcs() - get the destination mcs index
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|
@@ -761,8 +761,6 @@ QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
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if (!rxdma_ring_entry)
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break;
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qdf_assert_always(rxdma_ring_entry);
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desc_list->rx_desc.nbuf = nbuf;
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dp_rx_set_reuse_nbuf(&desc_list->rx_desc, nbuf);
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desc_list->rx_desc.rx_buf_start = nbuf->data;
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|
@@ -28,6 +28,7 @@
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#include "qdf_nbuf.h"
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#include "dp_rx_defrag.h"
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#include "dp_ipa.h"
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#include "dp_internal.h"
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#ifdef WIFI_MONITOR_SUPPORT
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#include "dp_htt.h"
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#include <dp_mon.h>
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@@ -1073,7 +1074,10 @@ more_msdu_link_desc:
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soc,
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msdu_list.sw_cookie[i]);
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qdf_assert_always(rx_desc);
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if (dp_assert_always_internal_stat(rx_desc, soc,
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rx.err.reo_err_rx_desc_null))
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continue;
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nbuf = rx_desc->nbuf;
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/*
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@@ -1638,7 +1642,6 @@ dp_rx_err_route_hdl(struct dp_soc *soc, qdf_nbuf_t nbuf,
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/* Set length in nbuf */
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qdf_nbuf_set_pktlen(
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nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
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qdf_assert_always(nbuf->data == rx_tlv_hdr);
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}
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/*
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@@ -2694,7 +2697,7 @@ dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
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dp_rx_err_alert("invalid reo push reason %u",
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wbm_err.info_bit.reo_psh_rsn);
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dp_rx_nbuf_free(nbuf);
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qdf_assert_always(0);
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dp_assert_always_internal(0);
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}
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} else if (wbm_err.info_bit.wbm_err_src ==
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HAL_RX_WBM_ERR_SRC_RXDMA) {
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@@ -2821,7 +2824,7 @@ dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
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dp_rx_err_alert("invalid rxdma push reason %u",
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wbm_err.info_bit.rxdma_psh_rsn);
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dp_rx_nbuf_free(nbuf);
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qdf_assert_always(0);
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dp_assert_always_internal(0);
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}
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} else {
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/* Should not come here */
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||||
|
@@ -8359,6 +8359,20 @@ void dp_dump_srng_high_wm_stats(struct dp_soc *soc, uint64_t srng_mask)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef GLOBAL_ASSERT_AVOIDANCE
|
||||
static void dp_print_assert_war_stats(struct dp_soc *soc)
|
||||
{
|
||||
DP_PRINT_STATS("Rx WAR stats: [%d] [%d] [%d] [%d]",
|
||||
soc->stats.rx.err.rx_desc_null,
|
||||
soc->stats.rx.err.wbm_err_buf_rel_type,
|
||||
soc->stats.rx.err.reo_err_rx_desc_null,
|
||||
soc->stats.rx.err.intra_bss_bad_chipid);
|
||||
}
|
||||
#else
|
||||
static void dp_print_assert_war_stats(struct dp_soc *soc)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
void
|
||||
dp_print_soc_rx_stats(struct dp_soc *soc)
|
||||
{
|
||||
@@ -8500,6 +8514,7 @@ dp_print_soc_rx_stats(struct dp_soc *soc)
|
||||
soc->stats.rx.err.defrag_ad1_invalid);
|
||||
DP_PRINT_STATS("Rx decrypt error frame for valid peer:%d",
|
||||
soc->stats.rx.err.decrypt_err_drop);
|
||||
dp_print_assert_war_stats(soc);
|
||||
}
|
||||
|
||||
#ifdef FEATURE_TSO_STATS
|
||||
|
@@ -1369,6 +1369,16 @@ struct dp_soc_stats {
|
||||
uint32_t defrag_ad1_invalid;
|
||||
/* decrypt error drop */
|
||||
uint32_t decrypt_err_drop;
|
||||
#ifdef GLOBAL_ASSERT_AVOIDANCE
|
||||
/* rx_desc NULL war count*/
|
||||
uint32_t rx_desc_null;
|
||||
/* wbm err invalid release buffer type */
|
||||
uint32_t wbm_err_buf_rel_type;
|
||||
/* Reo entry rx desc null */
|
||||
uint32_t reo_err_rx_desc_null;
|
||||
/* Invalid chip id received in intrabss path */
|
||||
uint64_t intra_bss_bad_chipid;
|
||||
#endif
|
||||
} err;
|
||||
|
||||
/* packet count per core - per ring */
|
||||
|
@@ -1141,10 +1141,10 @@ dp_rx_wbm_err_reap_desc_li(struct dp_intr *int_ctx, struct dp_soc *soc,
|
||||
/* XXX */
|
||||
buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
|
||||
|
||||
/*
|
||||
* For WBM ring, expect only MSDU buffers
|
||||
*/
|
||||
qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
|
||||
if (dp_assert_always_internal_stat(
|
||||
buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF,
|
||||
soc, rx.err.wbm_err_buf_rel_type))
|
||||
continue;
|
||||
|
||||
wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
|
||||
qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
|
||||
@@ -1157,7 +1157,9 @@ dp_rx_wbm_err_reap_desc_li(struct dp_intr *int_ctx, struct dp_soc *soc,
|
||||
continue;
|
||||
}
|
||||
|
||||
qdf_assert_always(rx_desc);
|
||||
if (dp_assert_always_internal_stat(rx_desc, soc,
|
||||
rx.err.rx_desc_null))
|
||||
continue;
|
||||
|
||||
if (!dp_rx_desc_check_magic(rx_desc)) {
|
||||
dp_rx_err_err("%pk: Invalid rx_desc %pk",
|
||||
@@ -1371,7 +1373,6 @@ dp_rx_null_q_desc_handle_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
|
||||
/* Set length in nbuf */
|
||||
qdf_nbuf_set_pktlen(
|
||||
nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
|
||||
qdf_assert_always(nbuf->data == rx_tlv_hdr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
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