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@@ -764,6 +764,40 @@ error:
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return rc;
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return rc;
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}
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}
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+/**
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+ * dsi_phy_get_data_lanes_count() - Count the data lines need to be configured
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+ * @dsi_phy: DSI PHY handle.
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+ *
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+ * Return: Count of data lanes being used
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+ */
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+static inline int dsi_phy_get_data_lanes_count(struct msm_dsi_phy *phy)
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+{
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+ int num_of_lanes = 0;
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+ enum dsi_data_lanes dlanes;
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+
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+ dlanes = phy->data_lanes;
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+
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+ /**
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+ * For split link use case effective data lines need to be used
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+ * rather than total lanes on PHY for clock calculation and hence we
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+ * fall back pll->lanes to lanes_per_sublink rather than total
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+ * lanes.
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+ */
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+ if (phy->cfg.split_link.enabled)
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+ return phy->cfg.split_link.lanes_per_sublink;
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+
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+ if (dlanes & DSI_DATA_LANE_0)
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+ num_of_lanes++;
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+ if (dlanes & DSI_DATA_LANE_1)
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+ num_of_lanes++;
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+ if (dlanes & DSI_DATA_LANE_2)
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+ num_of_lanes++;
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+ if (dlanes & DSI_DATA_LANE_3)
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+ num_of_lanes++;
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+
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+ return num_of_lanes;
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+}
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+
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/**
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/**
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* dsi_phy_configure() - Configure DSI PHY PLL
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* dsi_phy_configure() - Configure DSI PHY PLL
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* @dsi_phy: DSI PHY handle.
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* @dsi_phy: DSI PHY handle.
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@@ -779,7 +813,8 @@ int dsi_phy_configure(struct msm_dsi_phy *phy, bool commit)
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phy->pll->type = phy->cfg.phy_type;
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phy->pll->type = phy->cfg.phy_type;
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phy->pll->bpp = dsi_pixel_format_to_bpp(phy->dst_format);
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phy->pll->bpp = dsi_pixel_format_to_bpp(phy->dst_format);
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- phy->pll->lanes = dsi_get_num_of_data_lanes(phy->data_lanes);
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+ phy->pll->lanes = dsi_phy_get_data_lanes_count(phy);
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+
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if (phy->hw.ops.configure)
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if (phy->hw.ops.configure)
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rc = phy->hw.ops.configure(phy->pll, commit);
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rc = phy->hw.ops.configure(phy->pll, commit);
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