samsung-sm8650/android_kernel_samsung_sm8650-modules
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Merge "msm: camera: isp: Add support to print illegal programming IRQ errors" into camera-kernel.lnx.5.0

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This commit is contained in:
Haritha Chintalapati
2021-08-10 20:34:17 -07:00
committed by Gerrit - the friendly Code Review server
vanhempi 8c22a0ca43 a09f4b3b38
commit ad21805336
4 muutettua tiedostoa jossa 158 lisäystä ja 10 poistoa
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13
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid780.h
Näytä tiedosto

@@ -641,7 +641,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.offline_mode_en_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x186007,
.fatal_err_mask = 0x186005,
.non_fatal_err_mask = 0x10000000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x100010,
@@ -735,7 +735,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.offline_mode_en_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x186007,
.fatal_err_mask = 0x186005,
.non_fatal_err_mask = 0x10000000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x200020,
@@ -829,7 +829,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.offline_mode_en_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x186007,
.fatal_err_mask = 0x186005,
.non_fatal_err_mask = 0x10000000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x400040,
@@ -923,7 +923,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.offline_mode_en_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x186007,
.fatal_err_mask = 0x186005,
.non_fatal_err_mask = 0x10000000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x800080,
@@ -1017,7 +1017,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.debug_byte_cntr_rst_shift_val = 2,
.offline_mode_en_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x186007,
.fatal_err_mask = 0x186005,
.non_fatal_err_mask = 0x10000000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x1000100,
@@ -1127,11 +1127,14 @@ static struct cam_ife_csid_ver2_common_reg_info
.path_en_shift_val = 31,
.dt_id_shift_val = 27,
.vc_shift_val = 22,
.vc_mask = 0x1F,
.dt_shift_val = 16,
.dt_mask = 0x3F,
.crop_shift_val = 16,
.decode_format_shift_val = 12,
.decode_format1_shift_val = 16,
.decode_format1_supported = true,
.decode_format_mask = 0xF,
.frame_id_decode_en_shift_val = 1,
.multi_vcdt_vc1_shift_val = 2,
.multi_vcdt_dt1_shift_val = 7,

137
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c
Näytä tiedosto

@@ -1096,6 +1096,95 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
return 0;
}
static void cam_ife_csid_ver2_print_illegal_programming_irq_status(
struct cam_ife_csid_ver2_hw *csid_hw,
struct cam_isp_resource_node *res)
{
struct cam_ife_csid_ver2_reg_info *csid_reg = csid_hw->core_info->csid_reg;
struct cam_ife_csid_ver2_path_cfg *path_cfg =
(struct cam_ife_csid_ver2_path_cfg *)res->res_priv;
struct cam_ife_csid_cid_data *cid_data = &csid_hw->cid_data[path_cfg->cid];
struct cam_hw_soc_info *soc_info = &csid_hw->hw_info->soc_info;
void __iomem *base =
soc_info->reg_map[CAM_IFE_CSID_CLC_MEM_BASE_ID].mem_base;
const struct cam_ife_csid_ver2_path_reg_info *path_reg =
csid_reg->path_reg[res->res_id];
uint32_t vcdt_cfg0 = 0, cfg0 = 0, mup_rup_cfg = 0, cfg1 = 0;
uint32_t decode_fmt = 0, decode_fmt1 = 0;
uint32_t vc, dt, vc1, dt1;
cfg0 = cam_io_r_mb(base + path_reg->cfg0_addr);
cfg1 = cam_io_r_mb(base + path_reg->cfg1_addr);
vcdt_cfg0 = cam_io_r_mb(base + path_reg->multi_vcdt_cfg0_addr);
mup_rup_cfg = cam_io_r_mb(base + csid_reg->cmn_reg->rup_aup_cmd_addr);
if (cid_data->vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_1].valid) {
decode_fmt = ((cfg0 >>
csid_reg->cmn_reg->decode_format_shift_val) &
csid_reg->cmn_reg->decode_format_mask);
decode_fmt1 = ((cfg1 >>
csid_reg->cmn_reg->decode_format1_shift_val) &
csid_reg->cmn_reg->decode_format_mask);
vc = ((cfg0 >> csid_reg->cmn_reg->vc_shift_val) &
csid_reg->cmn_reg->vc_mask);
dt = ((cfg0 >> csid_reg->cmn_reg->dt_shift_val) &
csid_reg->cmn_reg->dt_mask);
vc1 = ((cfg1 >> csid_reg->cmn_reg->multi_vcdt_vc1_shift_val) &
csid_reg->cmn_reg->vc_mask);
dt1 = ((cfg1 >> csid_reg->cmn_reg->multi_vcdt_dt1_shift_val) &
csid_reg->cmn_reg->dt_mask);
if ((decode_fmt == csid_reg->cmn_reg->decode_format_payload_only) ||
(decode_fmt1 == csid_reg->cmn_reg->decode_format_payload_only)) {
if (decode_fmt1 != decode_fmt) {
CAM_ERR(CAM_ISP,
"CSID:%d decode_fmt %d decode_fmt1 %d mismatch",
csid_hw->hw_intf->hw_idx,
decode_fmt,
decode_fmt1);
}
}
if ((vc == vc1) && (dt == dt1)) {
if (decode_fmt != decode_fmt1) {
CAM_ERR(CAM_ISP,
"CSID:%d Wrong multi VC-DT configuration",
csid_hw->hw_intf->hw_idx);
CAM_ERR(CAM_ISP,
"fmt %d fmt1 %d vc %d vc1 %d dt %d dt1 %d",
decode_fmt, decode_fmt, vc, vc1, dt, dt1);
}
}
}
if (!((mup_rup_cfg & path_reg->rup_aup_mask) &&
(mup_rup_cfg & csid_reg->cmn_reg->mup_shift_val))) {
CAM_ERR(CAM_ISP,
"CSID:%d MUP bit %d is programmed without RUP %d",
csid_hw->hw_intf->hw_idx,
mup_rup_cfg & path_reg->rup_aup_mask,
mup_rup_cfg & csid_reg->cmn_reg->mup_shift_val);
}
if (!(csid_hw->debug_info.debug_val &
CAM_IFE_CSID_DEBUG_DISABLE_EARLY_EOF) &&
csid_reg->cmn_reg->early_eof_supported) {
if (!((cfg1 & path_reg->early_eof_en_shift_val) &&
(cfg1 & path_reg->crop_v_en_shift_val))) {
CAM_ERR(CAM_ISP,
"CSID:%d Early EOF %d enabled without VCROP %d",
csid_hw->hw_intf->hw_idx,
cfg1 & path_reg->early_eof_en_shift_val,
cfg1 & path_reg->crop_v_en_shift_val);
}
}
CAM_INFO(CAM_ISP, "CSID:%d Illegal Programming for res [id: %d name: %s]",
csid_hw->hw_intf->hw_idx, res->res_id, res->res_name);
}
static void cam_ife_csid_ver2_print_debug_reg_status(
struct cam_ife_csid_ver2_hw *csid_hw,
struct cam_isp_resource_node *res)
@@ -1345,6 +1434,22 @@ static int cam_ife_csid_ver2_ipp_bottom_half(
CAM_IFE_CSID_IRQ_REG_IPP,
err_mask, irq_status_ipp);
if (irq_status_ipp & IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
if (path_reg->fatal_err_mask &
IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
CAM_ERR(CAM_ISP, "CSID[%u] Illegal Programming for IPP status:0x%x",
csid_hw->hw_intf->hw_idx,irq_status_ipp);
cam_ife_csid_ver2_print_illegal_programming_irq_status(
csid_hw, res);
} else {
CAM_ERR(CAM_ISP, "Illegal Programming IRQ is not supported");
CAM_INFO(CAM_ISP, "CSID[%u]: status:0x%x",
csid_hw->hw_intf->hw_idx, irq_status_ipp);
}
err_type |= CAM_ISP_HW_ERROR_CSID_FATAL;
}
if (irq_status_ipp & IFE_CSID_VER2_PATH_RECOVERY_OVERFLOW)
err_type |= CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW;
@@ -1414,6 +1519,21 @@ static int cam_ife_csid_ver2_ppp_bottom_half(
csid_hw, CAM_IFE_CSID_IRQ_REG_PPP,
err_mask, irq_status_ppp);
if (irq_status_ppp & IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
if (path_reg->fatal_err_mask &
IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
CAM_ERR(CAM_ISP, "CSID[%u] Illegal Programming for PPP status:0x%x",
csid_hw->hw_intf->hw_idx,irq_status_ppp);
cam_ife_csid_ver2_print_illegal_programming_irq_status(
csid_hw, res);
} else {
CAM_ERR(CAM_ISP, "Illegal Programming IRQ is not supported");
CAM_INFO(CAM_ISP, "CSID[%u]: status:0x%x",
csid_hw->hw_intf->hw_idx, irq_status_ppp);
}
err_type |= CAM_ISP_HW_ERROR_CSID_FATAL;
}
if (irq_status_ppp & (IFE_CSID_VER2_PATH_ERROR_PIX_COUNT |
IFE_CSID_VER2_PATH_ERROR_LINE_COUNT)) {
cam_ife_csid_ver2_print_format_measure_info(csid_hw, res);
@@ -1490,6 +1610,23 @@ static int cam_ife_csid_ver2_rdi_bottom_half(
path_cfg->irq_reg_idx,
err_mask, irq_status_rdi);
if (irq_status_rdi & IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
if (rdi_reg->fatal_err_mask &
IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
CAM_ERR(CAM_ISP, "CSID[%u]: Illegal Programming for RDI:%d status:0x%x",
csid_hw->hw_intf->hw_idx,
res->res_id, irq_status_rdi);
cam_ife_csid_ver2_print_illegal_programming_irq_status(
csid_hw, res);
} else {
CAM_ERR(CAM_ISP, "Illegal Programming IRQ is not supported");
CAM_INFO(CAM_ISP, "CSID[%u]: RDI:%d status:0x%x",
csid_hw->hw_intf->hw_idx,
res->res_id, irq_status_rdi);
}
err_type |= CAM_ISP_HW_ERROR_CSID_FATAL;
}
if (irq_status_rdi & IFE_CSID_VER2_PATH_RECOVERY_OVERFLOW)
err_type |= CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW;

5
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.h
Näytä tiedosto

@@ -40,6 +40,7 @@
#define CAM_IFE_CSID_VER2_PAYLOAD_MAX 256
#define IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM BIT(0)
#define IFE_CSID_VER2_PATH_ERROR_FIFO_OVERFLOW BIT(2)
#define IFE_CSID_VER2_PATH_CAMIF_EOF BIT(3)
#define IFE_CSID_VER2_PATH_CAMIF_SOF BIT(4)
@@ -378,12 +379,15 @@ struct cam_ife_csid_ver2_common_reg_info {
uint32_t decode_format_shift_val;
uint32_t decode_format1_shift_val;
bool decode_format1_supported;
uint32_t decode_format_mask;
uint32_t start_mode_shift_val;
uint32_t start_cmd_shift_val;
uint32_t path_en_shift_val;
uint32_t dt_id_shift_val;
uint32_t vc_shift_val;
uint32_t vc_mask;
uint32_t dt_shift_val;
uint32_t dt_mask;
uint32_t crop_shift_val;
uint32_t debug_frm_drop_rst_shift_val;
uint32_t debug_timestamp_rst_shift_val;
@@ -447,6 +451,7 @@ struct cam_ife_csid_ver2_common_reg_info {
uint32_t global_reset;
uint32_t rup_supported;
uint32_t only_master_rup;
/* Masks */
uint32_t pxl_cnt_mask;
uint32_t line_cnt_mask;

13
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite780.h
Näytä tiedosto

@@ -364,10 +364,13 @@ static struct cam_ife_csid_ver2_common_reg_info
.path_en_shift_val = 31,
.dt_id_shift_val = 27,
.vc_shift_val = 22,
.vc_mask = 0x1F,
.dt_shift_val = 16,
.dt_mask = 0x3F,
.crop_shift_val = 16,
.decode_format_shift_val = 12,
.decode_format1_shift_val = 16,
.decode_format_mask = 0xF,
.decode_format1_supported = true,
.frame_id_decode_en_shift_val = 1,
.multi_vcdt_vc1_shift_val = 2,
@@ -558,7 +561,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.overflow_ctrl_mode_val = 0x8,
.min_hbi_shift_val = 4,
.start_master_sel_shift_val = 4,
.fatal_err_mask = 0x4,
.fatal_err_mask = 0x7,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x10001,
@@ -646,7 +649,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.timestamp_en_shift_val = 4,
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.fatal_err_mask = 0x5,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x100010,
@@ -733,7 +736,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.timestamp_en_shift_val = 4,
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.fatal_err_mask = 0x5,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x200020,
@@ -820,7 +823,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.timestamp_en_shift_val = 4,
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.fatal_err_mask = 0x5,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x400040,
@@ -907,7 +910,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.timestamp_en_shift_val = 4,
.debug_byte_cntr_rst_shift_val = 2,
.ccif_violation_en = 1,
.fatal_err_mask = 0x4,
.fatal_err_mask = 0x5,
.non_fatal_err_mask = 0x10080000,
.camif_irq_mask = 0x800000,
.rup_aup_mask = 0x800080,