qcacmn: Add delayed reg write support based on EP power state
Even though HP/TP updates are posted writes at CPU level, they are getting blocked until soc comes out retention which is hogging CPU. To avoid this if EP is in low power state update HP/TP writes from delayed work context. In delayed work vote for EP awake wait till it comes out low power state and then proceed to HP/TP update. Change-Id: I61d5795f58f25f850b5a9ad4d30e3181dba23713 CRs-Fixed: 2913495
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committed by
Madan Koyyalamudi

szülő
35b9bf6c44
commit
ad0f442d8f
@@ -1277,6 +1277,44 @@ void hal_delayed_reg_write(struct hal_soc *hal_soc,
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#else
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#ifdef FEATURE_HAL_DELAYED_REG_WRITE
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#ifdef QCA_WIFI_QCA6750
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void hal_delayed_reg_write(struct hal_soc *hal_soc,
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struct hal_srng *srng,
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void __iomem *addr,
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uint32_t value)
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{
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switch (srng->ring_type) {
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case CE_SRC:
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case CE_DST:
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case CE_DST_STATUS:
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if (hif_get_ep_vote_access(hal_soc->hif_handle,
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HIF_EP_VOTE_NONDP_ACCESS) ==
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HIF_EP_VOTE_ACCESS_DISABLE) {
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hal_write_address_32_mb(hal_soc, addr, value, false);
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qdf_atomic_inc(&hal_soc->stats.wstats.direct);
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srng->wstats.direct++;
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} else {
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hal_reg_write_enqueue(hal_soc, srng, addr, value);
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}
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break;
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default:
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if (hif_get_ep_vote_access(hal_soc->hif_handle,
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HIF_EP_VOTE_DP_ACCESS) ==
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HIF_EP_VOTE_ACCESS_DISABLE ||
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hal_is_reg_write_tput_level_high(hal_soc) ||
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PLD_MHI_STATE_L0 ==
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pld_get_mhi_state(hal_soc->qdf_dev->dev)) {
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hal_write_address_32_mb(hal_soc, addr, value, false);
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qdf_atomic_inc(&hal_soc->stats.wstats.direct);
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srng->wstats.direct++;
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} else {
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hal_reg_write_enqueue(hal_soc, srng, addr, value);
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}
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break;
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}
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}
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#else
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void hal_delayed_reg_write(struct hal_soc *hal_soc,
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struct hal_srng *srng,
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void __iomem *addr,
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@@ -1293,6 +1331,7 @@ void hal_delayed_reg_write(struct hal_soc *hal_soc,
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}
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#endif
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#endif
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#endif
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/**
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* hal_attach - Initialize HAL layer
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