msm: ipa: update gsi config for RTK

1. Change the RTK doorbell to MSI doorbell.
2. Update RTK element size to 32B.

Change-Id: Iec9301e30b51841c139b97abeaa6354a88fdef59

drivers/platform/msm/gsi/gsi.c

@@ -4941,7 +4941,7 @@ void gsi_wdi3_dump_register(unsigned long chan_hdl)
 }
 EXPORT_SYMBOL(gsi_wdi3_dump_register);
 
-int gsi_query_aqc_msi_addr(unsigned long chan_hdl, phys_addr_t *addr)
+int gsi_query_msi_addr(unsigned long chan_hdl, phys_addr_t *addr)
 {
         if (!gsi_ctx) {
                 pr_err("%s:%d gsi context not allocated\n", __func__, __LINE__);
@@ -4965,7 +4965,7 @@ int gsi_query_aqc_msi_addr(unsigned long chan_hdl, phys_addr_t *addr)
 
         return 0;
 }
-EXPORT_SYMBOL(gsi_query_aqc_msi_addr);
+EXPORT_SYMBOL(gsi_query_msi_addr);
 
 static union __packed gsi_channel_scratch __gsi_update_mhi_channel_scratch(
 	unsigned long chan_hdl, struct __packed gsi_mhi_channel_scratch mscr)

drivers/platform/msm/gsi/gsi.h

@@ -2259,14 +2259,14 @@ int gsi_enable_flow_control_ee(unsigned int chan_idx, unsigned int ee,
 								int *code);
 
 /**
-* gsi_query_aqc_msi_addr - get aqc channel msi address
+* gsi_query_msi_addr - get gsi channel msi address
 *
 * @chan_id: channel id
-* @addr: [out] aqc channel msi address
+* @addr: [out] channel msi address
 *
 * @Return gsi_status
 */
-int gsi_query_aqc_msi_addr(unsigned long chan_hdl, phys_addr_t *addr);
+int gsi_query_msi_addr(unsigned long chan_hdl, phys_addr_t *addr);
 
 /**
 * gsi_dump_ch_info - channel information.

drivers/platform/msm/ipa/ipa_v3/ipa_eth_i.c

@@ -27,6 +27,8 @@
 #define IPA_RTK_RX_MBOX_VAL (1)
 #define IPA_RTK_TX_MBOX_VAL (2)
 
+#define IPA_ETH_MSI_DB_VAL (0xFDB)
+
 #define IPA_ETH_PCIE_MASK BIT_ULL(40)
 #define IPA_ETH_PCIE_SET(val) (val | IPA_ETH_PCIE_MASK)
 
@@ -331,7 +333,7 @@ static int ipa_eth_setup_rtk_gsi_channel(
 	memset(&gsi_evt_ring_props, 0, sizeof(gsi_evt_ring_props));
 	gsi_evt_ring_props.intf = GSI_EVT_CHTYPE_RTK_EV;
 	gsi_evt_ring_props.intr = GSI_INTR_MSI;
-	gsi_evt_ring_props.re_size = GSI_EVT_RING_RE_SIZE_16B;
+	gsi_evt_ring_props.re_size = GSI_EVT_RING_RE_SIZE_32B;
 	if (pipe->dir == IPA_ETH_PIPE_DIR_TX) {
 		gsi_evt_ring_props.int_modt = IPA_ETH_RTK_MODT;
 		gsi_evt_ring_props.int_modc = IPA_ETH_RTK_MODC;
@@ -374,8 +376,9 @@ static int ipa_eth_setup_rtk_gsi_channel(
 	} else
 		gsi_channel_props.ch_id = gsi_ep_info->ipa_gsi_chan_num;
 	gsi_channel_props.evt_ring_hdl = ep->gsi_evt_ring_hdl;
-	gsi_channel_props.re_size = GSI_CHAN_RE_SIZE_16B;
+	gsi_channel_props.re_size = GSI_CHAN_RE_SIZE_32B;
 	gsi_channel_props.use_db_eng = GSI_CHAN_DB_MODE;
+	gsi_channel_props.db_in_bytes = 1;
 	gsi_channel_props.max_prefetch = GSI_ONE_PREFETCH_SEG;
 	gsi_channel_props.prefetch_mode =
 		gsi_ep_info->prefetch_mode;
@@ -780,73 +783,45 @@ int ipa3_eth_connect(
 			goto setup_gsi_ch_fail;
 		}
 	}
-
 	if (gsi_query_channel_db_addr(ep->gsi_chan_hdl,
 		&gsi_db_addr_low, &gsi_db_addr_high)) {
 		IPAERR("failed to query gsi rx db addr\n");
 		result = -EFAULT;
 		goto query_ch_db_fail;
 	}
-	/* only 32 bit lsb is used */
-	db_addr = ioremap((phys_addr_t)(gsi_db_addr_low), 4);
-	if (IPA_CLIENT_IS_PROD(client_type)) {
-		/* Rx: Initialize to ring base (i.e point 6) */
-		db_val = (u32)ep->gsi_mem_info.chan_ring_base_addr;
-	} else {
-		/* TX: Initialize to end of ring */
-		db_val = (u32)ep->gsi_mem_info.chan_ring_base_addr;
-		db_val += (u32)ep->gsi_mem_info.chan_ring_len;
-	}
-	iowrite32(db_val, db_addr);
-	iounmap(db_addr);
-	gsi_query_evt_ring_db_addr(ep->gsi_evt_ring_hdl,
-		&evt_ring_db_addr_low, &evt_ring_db_addr_high);
-	IPADBG("evt_ring_hdl %lu, db_addr_low %u db_addr_high %u\n",
-		ep->gsi_evt_ring_hdl, evt_ring_db_addr_low,
-		evt_ring_db_addr_high);
-	/* only 32 bit lsb is used */
-	db_addr = ioremap((phys_addr_t)(evt_ring_db_addr_low), 4);
-	/*
-	* IPA/GSI driver should ring the event DB once after
-	* initialization of the event, with a value that is
-	* outside of the ring range. Eg: ring base = 0x1000,
-	* ring size = 0x100 => AP can write value > 0x1100
-	* into the doorbell address. Eg: 0x 1110.
-	* Use event ring base addr + event ring size + 1 element size.
-	*/
-	db_val = (u32)ep->gsi_mem_info.evt_ring_base_addr;
-	db_val += (u32)ep->gsi_mem_info.evt_ring_len;
-	db_val += GSI_EVT_RING_RE_SIZE_16B;
-	iowrite32(db_val, db_addr);
-	iounmap(db_addr);
 	if (ipa3_ctx->ipa_hw_type >= IPA_HW_v5_0) {
 		if (prot == IPA_HW_PROTOCOL_AQC) {
 			if (IPA_CLIENT_IS_PROD(client_type)) {
-				if (gsi_query_aqc_msi_addr(ep->gsi_chan_hdl,
+				if (gsi_query_msi_addr(ep->gsi_chan_hdl,
 					&pipe->info.db_pa)) {
 					result = -EFAULT;
 					goto query_msi_fail;
 				}
+				/* we don't need to ring the MSI doorbell in RX case */
 			} else {
 				pipe->info.db_pa = gsi_db_addr_low;
 				pipe->info.db_val = 0;
+				/* only 32 bit lsb is used */
+				db_addr = ioremap((phys_addr_t)(gsi_db_addr_low), 4);
+				/* TX: Initialize to end of ring */
+				db_val = (u32)ep->gsi_mem_info.chan_ring_base_addr;
+				db_val += (u32)ep->gsi_mem_info.chan_ring_len;
+				iowrite32(db_val, db_addr);
+				iounmap(db_addr);
 			}
 		} else if (prot == IPA_HW_PROTOCOL_RTK) {
-			/* SDX65 Phase 1, uC still doing doorbell fwd */
-			if (IPA_CLIENT_IS_PROD(client_type)) {
-				pipe->info.db_pa = ipa3_ctx->ipa_wrapper_base +
-					ipahal_get_reg_base() +
-					ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n,
-						IPA_ETH_MBOX_M,
-						IPA_RTK_RX_MBOX_N);
-				pipe->info.db_val = IPA_RTK_RX_MBOX_VAL;
-			} else {
-				pipe->info.db_pa = ipa3_ctx->ipa_wrapper_base +
-					ipahal_get_reg_base() +
-					ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n,
-						IPA_ETH_MBOX_M,
-						IPA_RTK_TX_MBOX_N);
-				pipe->info.db_val = IPA_RTK_TX_MBOX_VAL;
+			if (gsi_query_msi_addr(ep->gsi_chan_hdl,
+					&pipe->info.db_pa)) {
+				result = -EFAULT;
+				goto query_msi_fail;
+			}
+			if (IPA_CLIENT_IS_CONS(client_type)) {
+				/* only 32 bit lsb is used */
+				db_addr = ioremap((phys_addr_t)(pipe->info.db_pa), 4);
+				/* TX: ring MSI doorbell */
+				db_val = IPA_ETH_MSI_DB_VAL;
+				iowrite32(db_val, db_addr);
+				iounmap(db_addr);
 			}
 		}
 	} else {
@@ -867,6 +842,12 @@ int ipa3_eth_connect(
 						IPA_AQC_RX_MBOX_N);
 				pipe->info.db_val = IPA_AQC_RX_MBOX_VAL;
 			}
+			/* only 32 bit lsb is used */
+			db_addr = ioremap((phys_addr_t)(gsi_db_addr_low), 4);
+			/* Rx: Initialize to ring base (i.e point 6) */
+			db_val = (u32)ep->gsi_mem_info.chan_ring_base_addr;
+			iowrite32(db_val, db_addr);
+			iounmap(db_addr);
 		} else {
 			/* TX mailbox */
 			if (prot == IPA_HW_PROTOCOL_RTK) {
@@ -880,9 +861,40 @@ int ipa3_eth_connect(
 				pipe->info.db_pa = gsi_db_addr_low;
 				pipe->info.db_val = 0;
 			}
+			/* only 32 bit lsb is used */
+			db_addr = ioremap((phys_addr_t)(gsi_db_addr_low), 4);
+			/* TX: Initialize to end of ring */
+			db_val = (u32)ep->gsi_mem_info.chan_ring_base_addr;
+			db_val += (u32)ep->gsi_mem_info.chan_ring_len;
+			iowrite32(db_val, db_addr);
+			iounmap(db_addr);
 		}
 	}
-
+	gsi_query_evt_ring_db_addr(ep->gsi_evt_ring_hdl,
+		&evt_ring_db_addr_low, &evt_ring_db_addr_high);
+	IPADBG("evt_ring_hdl %lu, db_addr_low %u db_addr_high %u\n",
+		ep->gsi_evt_ring_hdl, evt_ring_db_addr_low,
+		evt_ring_db_addr_high);
+	/* only 32 bit lsb is used */
+	db_addr = ioremap((phys_addr_t)(evt_ring_db_addr_low), 4);
+	/*
+	* IPA/GSI driver should ring the event DB once after
+	* initialization of the event, with a value that is
+	* outside of the ring range. Eg: ring base = 0x1000,
+	* ring size = 0x100 => AP can write value > 0x1100
+	* into the doorbell address. Eg: 0x 1110.
+	* Use event ring base addr + event ring size + 1 element size.
+	*/
+	db_val = (u32)ep->gsi_mem_info.evt_ring_base_addr;
+	db_val += (u32)ep->gsi_mem_info.evt_ring_len;
+	if (ipa3_ctx->ipa_hw_type >= IPA_HW_v5_0 &&
+		prot == IPA_HW_PROTOCOL_RTK) {
+		db_val += GSI_EVT_RING_RE_SIZE_32B;
+	} else {
+		db_val += GSI_EVT_RING_RE_SIZE_16B;
+	}
+	iowrite32(db_val, db_addr);
+	iounmap(db_addr);
 
 	/* enable data path */
 	result = ipa3_enable_data_path(ep_idx);