disp: msm: update RSC bandwidth during solver mode transition
Currently when disconnecting a secondary monitor, RSC will transition to solver mode. If the bandwidth remains the same for primary display, SW will not update BW indication register causing stale TCS wait values. This change forces a register update when RSC mode is changed to solver mode. Change-Id: I99d2332621bad75a7b6abdb64d6aedd35c30ca63 Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
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@@ -429,6 +429,11 @@ static int sde_rsc_state_update_v3(struct sde_rsc_priv *rsc,
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reg, rsc->debug_mode);
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wmb(); /* make sure that solver is enabled */
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if (rsc->hw_ops.bwi_status) {
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rsc->bwi_update = BW_NO_CHANGE;
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rsc->hw_ops.bwi_status(rsc);
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}
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break;
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case SDE_RSC_VID_STATE:
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