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@@ -165,9 +165,10 @@
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* HTT_T2H_MSG_TYPE_PKTLOG
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* 3.49 Add HTT_T2H_MSG_TYPE_MONITOR_MAC_HEADER_IND def
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* 3.50 Add learning_frame flag to htt_tx_msdu_desc_ext2_t
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+ * 3.51 Add SW peer ID and TID num to HTT TX WBM COMPLETION
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*/
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#define HTT_CURRENT_VERSION_MAJOR 3
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-#define HTT_CURRENT_VERSION_MINOR 50
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+#define HTT_CURRENT_VERSION_MINOR 51
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#define HTT_NUM_TX_FRAG_DESC 1024
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@@ -2331,7 +2332,14 @@ PREPACK struct htt_tx_wbm_transmit_status {
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* Units: dB w.r.t noise floor
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*/
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A_UINT32
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- reserved0: 32;
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+ sw_peer_id: 16,
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+ tid_num: 5,
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+ valid: 1, /* If this "valid" flag is set, the sw_peer_id
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+ * and tid_num fields contain valid data.
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+ * If this "valid" flag is not set, the
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+ * sw_peer_id and tid_num fields must be ignored.
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+ */
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+ reserved0: 10;
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A_UINT32
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reserved1: 32;
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} POSTPACK;
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@@ -2342,6 +2350,14 @@ PREPACK struct htt_tx_wbm_transmit_status {
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#define HTT_TX_WBM_COMPLETION_V2_ACK_FRAME_RSSI_M 0xff000000
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#define HTT_TX_WBM_COMPLETION_V2_ACK_FRAME_RSSI_S 24
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+/* DWORD 5 */
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+#define HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_M 0x0000ffff
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+#define HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_S 0
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+#define HTT_TX_WBM_COMPLETION_V2_TID_NUM_M 0x001f0000
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+#define HTT_TX_WBM_COMPLETION_V2_TID_NUM_S 16
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+#define HTT_TX_WBM_COMPLETION_V2_VALID_M 0x00200000
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+#define HTT_TX_WBM_COMPLETION_V2_VALID_S 21
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+
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/* DWORD 4 */
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#define HTT_TX_WBM_COMPLETION_V2_SCH_CMD_ID_GET(_var) \
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(((_var) & HTT_TX_WBM_COMPLETION_V2_SCH_CMD_ID_M) >> \
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@@ -2363,6 +2379,37 @@ PREPACK struct htt_tx_wbm_transmit_status {
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((_var) |= ((_val) << HTT_TX_WBM_COMPLETION_V2_ACK_FRAME_RSSI_S)); \
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} while (0)
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+/* DWORD 5 */
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+#define HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_GET(_var) \
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+ (((_var) & HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_M) >> \
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+ HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_S)
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+
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+#define HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_SET(_var, _val) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID, _val); \
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+ ((_var) |= ((_val) << HTT_TX_WBM_COMPLETION_V2_SW_PEER_ID_S)); \
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+ } while (0)
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+
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+#define HTT_TX_WBM_COMPLETION_V2_TID_NUM_GET(_var) \
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+ (((_var) & HTT_TX_WBM_COMPLETION_V2_TID_NUM_M) >> \
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+ HTT_TX_WBM_COMPLETION_V2_TID_NUM_S)
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+
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+#define HTT_TX_WBM_COMPLETION_V2_TID_NUM_SET(_var, _val) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_TX_WBM_COMPLETION_V2_TID_NUM, _val); \
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+ ((_var) |= ((_val) << HTT_TX_WBM_COMPLETION_V2_TID_NUM_S)); \
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+ } while (0)
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+
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+#define HTT_TX_WBM_COMPLETION_V2_VALID_GET(_var) \
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+ (((_var) & HTT_TX_WBM_COMPLETION_V2_VALID_M) >> \
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+ HTT_TX_WBM_COMPLETION_V2_VALID_S)
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+
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+#define HTT_TX_WBM_COMPLETION_V2_VALID_SET(_var, _val) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_TX_WBM_COMPLETION_V2_VALID, _val); \
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+ ((_var) |= ((_val) << HTT_TX_WBM_COMPLETION_V2_VALID_S)); \
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+ } while (0)
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+
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/**
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* @brief HTT TX WBM reinject status from firmware to host
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* @details
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