Merge "msm: camera: isp: Skip exposure config for resources with no read" into camera-kernel.lnx.5.0

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

@@ -7131,12 +7131,10 @@ static int cam_isp_blob_sfe_scratch_buf_update(
 
 	ctx = prepare->ctxt_to_hw_map;
 	ife_hw_mgr = ctx->hw_mgr;
-	if (ctx->sfe_info.scratch_config->config_done) {
-		CAM_ERR(CAM_ISP,
-			"Scratch buffers already configured on ctx: %u",
-			ctx->ctx_index);
-		return -EINVAL;
-	}
+	if (scratch_config->num_ports != ctx->sfe_info.num_fetches)
+		CAM_WARN(CAM_ISP,
+			"Getting scratch buffer for %u ports on ctx: %u with num_fetches: %u",
+			scratch_config->num_ports, ctx->ctx_index, ctx->sfe_info.num_fetches);
 
 	CAM_DBG(CAM_ISP, "num_ports: %u", scratch_config->num_ports);
 
@@ -7188,6 +7186,7 @@ static int cam_isp_blob_sfe_scratch_buf_update(
 		port_info->stride = buffer_info->stride;
 		port_info->slice_height = buffer_info->slice_height;
 		port_info->offset = 0;
+		port_info->config_done = true;
 		CAM_DBG(CAM_ISP,
 			"res_id: 0x%x w: 0x%x h: 0x%x s: 0x%x sh: 0x%x addr: 0x%x",
 			port_info->res_id, port_info->width,
@@ -7196,7 +7195,6 @@ static int cam_isp_blob_sfe_scratch_buf_update(
 	}
 
 	ctx->sfe_info.scratch_config->num_config = scratch_config->num_ports;
-	ctx->sfe_info.scratch_config->config_done = true;
 	return 0;
 }
 
@@ -7245,6 +7243,11 @@ static int cam_isp_blob_sfe_exp_order_update(
 		return 0;
 	}
 
+	if (!exp_config->num_ports) {
+		CAM_ERR(CAM_ISP, "Invalid number of ports: %d", exp_config->num_ports);
+		return -EINVAL;
+	}
+
 	/*
 	 *  The last resource in the array will be considered as
 	 *  last exposure
@@ -7263,14 +7266,16 @@ static int cam_isp_blob_sfe_exp_order_update(
 
 		if ((order_cfg->res_type - CAM_ISP_SFE_OUT_RES_RDI_0) >=
 			ctx->sfe_info.num_fetches) {
-			CAM_ERR(CAM_ISP, "resource 0x%x active fetches: %u mismatch",
-				order_cfg->res_type, ctx->sfe_info.num_fetches);
-			return -EINVAL;
+			CAM_DBG(CAM_ISP,
+				"Skip cache config for resource: 0x%x, active fetches: %u [exp_order: %d %d] in %u ctx",
+				order_cfg->res_type, ctx->sfe_info.num_fetches,
+				i, exp_order_max, ctx->ctx_index);
+			continue;
 		}
 
 		/* Add more params if needed */
-		wm_rm_cache_cfg.wr_enabled = false;
-		wm_rm_cache_cfg.rd_enabled = false;
+		wm_rm_cache_cfg.wr_cfg_done = false;
+		wm_rm_cache_cfg.rd_cfg_done = false;
 		wm_rm_cache_cfg.use_cache =
 			(exp_order_max == i) ? true : false;
 		wm_rm_cache_cfg.scid = 0;
@@ -7357,7 +7362,7 @@ static int cam_isp_blob_sfe_exp_order_update(
 			return -EINVAL;
 		}
 
-		if (!wm_rm_cache_cfg.rd_enabled && !wm_rm_cache_cfg.wr_enabled) {
+		if (!wm_rm_cache_cfg.rd_cfg_done && !wm_rm_cache_cfg.wr_cfg_done) {
 			wm_rm_cache_cfg.use_cache = false;
 			if (base_idx == CAM_SFE_CORE_0)
 				ctx->flags.sys_cache_usage[CAM_LLCC_SMALL_1] = false;
@@ -8083,18 +8088,18 @@ static int cam_ife_hw_mgr_update_scratch_offset(
 	uint32_t res_id;
 	struct cam_sfe_scratch_buf_info       *port_info;
 
-	if (!ctx->sfe_info.scratch_config->config_done) {
-		CAM_ERR(CAM_ISP,
-			"Scratch buffers not configured on ctx: %u",
-			ctx->ctx_index);
-		return -EINVAL;
-	}
-
 	if ((wm_config->port_type - CAM_ISP_SFE_OUT_RES_RDI_0) >=
 		ctx->sfe_info.num_fetches)
 		return 0;
 
 	res_id = wm_config->port_type & 0xFF;
+	if (!ctx->sfe_info.scratch_config->buf_info[res_id].config_done) {
+		CAM_ERR(CAM_ISP,
+			"Scratch buffer not configured on ctx: %u for res: %u",
+			ctx->ctx_index, res_id);
+		return -EINVAL;
+	}
+
 	port_info = &ctx->sfe_info.scratch_config->buf_info[res_id];
 	port_info->offset = wm_config->offset;
 
@@ -9644,12 +9649,6 @@ static int cam_isp_sfe_add_scratch_buffer_cfg(
 	struct cam_sfe_scratch_buf_info   *buf_info;
 	struct cam_isp_hw_mgr_res         *hw_mgr_res;
 
-	if (!ctx || !ctx->sfe_info.scratch_config->config_done) {
-		CAM_ERR(CAM_ISP, "Scratch buffer info invalid");
-		rc = -EINVAL;
-		return rc;
-	}
-
 	if (prepare->num_hw_update_entries + 1 >=
 			prepare->max_hw_update_entries) {
 		CAM_ERR(CAM_ISP, "Insufficient  HW entries :%d %d",
@@ -9700,6 +9699,14 @@ static int cam_isp_sfe_add_scratch_buffer_cfg(
 			buf_info = &ctx->sfe_info.scratch_config->buf_info[
 				res_id - CAM_ISP_SFE_OUT_RES_RDI_0];
 
+			/* Check if scratch available for this resource */
+			if (!buf_info->config_done) {
+				CAM_ERR(CAM_ISP,
+					"No scratch buffer config found for res: %u on ctx: %u",
+					res_id, ctx->ctx_index);
+				return -EFAULT;
+			}
+
 			CAM_DBG(CAM_ISP, "WM res_id: 0x%x idx: %u io_addr: %pK",
 				hw_mgr_res->hw_res[j]->res_id,
 				(res_id - CAM_ISP_SFE_OUT_RES_RDI_0),
@@ -10648,12 +10655,6 @@ static int cam_ife_mgr_prog_default_settings(
 	res_list_in_rd = &ctx->res_list_ife_in_rd;
 	res_list_sfe_out = ctx->res_list_sfe_out;
 
-	if (!ctx->sfe_info.scratch_config->config_done) {
-		CAM_ERR(CAM_ISP, "No scratch config on ctx: %u",
-			ctx->ctx_index);
-		return -EINVAL;
-	}
-
 	for (i = 0; i < CAM_SFE_FE_RDI_NUM_MAX; i++) {
 		hw_mgr_res = &res_list_sfe_out[i];
 		for (j = 0; j < CAM_ISP_HW_SPLIT_MAX; j++) {
@@ -10670,6 +10671,14 @@ static int cam_ife_mgr_prog_default_settings(
 			buf_info = &ctx->sfe_info.scratch_config->buf_info[
 				res_id - CAM_ISP_SFE_OUT_RES_RDI_0];
 
+			/* Check if scratch available for this resource */
+			if (!buf_info->config_done) {
+				CAM_ERR(CAM_ISP,
+					"No scratch buffer config found for res: %u on ctx: %u",
+					res_id, ctx->ctx_index);
+				return -EFAULT;
+			}
+
 			CAM_DBG(CAM_ISP,
 				"RDI%d res_id 0x%x idx %u io_addr %pK",
 				i,
@@ -11901,16 +11910,14 @@ static int cam_ife_hw_mgr_check_rdi_scratch_buf_done(
 	dma_addr_t final_addr;
 	uint32_t cmp_addr = 0;
 
-	if (!scratch_cfg->config_done) {
-		CAM_DBG(CAM_ISP, "No scratch config for ctx: %u", ctx_index);
-		return 0;
-	}
-
 	switch (res_id) {
 	case CAM_ISP_SFE_OUT_RES_RDI_0:
 	case CAM_ISP_SFE_OUT_RES_RDI_1:
 	case CAM_ISP_SFE_OUT_RES_RDI_2:
 		buf_info = &scratch_cfg->buf_info[res_id - CAM_ISP_SFE_OUT_RES_RDI_0];
+		if (!buf_info->config_done)
+			return 0;
+
 		final_addr = buf_info->io_addr + buf_info->offset;
 		cmp_addr = cam_smmu_is_expanded_memory() ?
 			CAM_36BIT_INTF_GET_IOVA_BASE(final_addr) : final_addr;

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.h

@@ -90,6 +90,7 @@ struct cam_ife_hw_mgr_ctx_pf_info {
  * @io_addr: Buffer address
  * @res_id: Resource type
  * @offset: Buffer offset
+ * @config_done: To indicate if RDIx received scratch cfg
  * @is_secure: secure scratch buffer
  */
 struct cam_sfe_scratch_buf_info {
@@ -100,20 +101,19 @@ struct cam_sfe_scratch_buf_info {
 	dma_addr_t io_addr;
 	uint32_t   res_id;
 	uint32_t   offset;
+	bool       config_done;
 	bool       is_secure;
 };
 
 /**
  * struct cam_sfe_scratch_buf_cfg - Scratch buf info
  *
- * @config_done: To indicate if stream received it's scratch cfg
  * @num_configs: Number of buffer configs [max of 3 currently]
  * @curr_num_exp: Current num of exposures
  * @buf_info: Info on each of the buffers
  *
  */
 struct cam_sfe_scratch_buf_cfg {
-	bool                            config_done;
 	uint32_t                        num_config;
 	uint32_t                        curr_num_exp;
 	struct cam_sfe_scratch_buf_info buf_info[

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_sfe_hw_intf.h

@@ -142,9 +142,9 @@ struct cam_sfe_core_config_args {
  * @Brief:         Based on exp order rxved from userland
  *                 configure sys cache for SFE WMs & RMs
  *
- * @wr_enabled:    Output param to indicate if SFE
+ * @wr_cfg_done:   Output param to indicate if SFE
  *                 bus WR accepted these settings
- * @rd_enabled:    Output param to indicate if SFE
+ * @rd_cfg_done:   Output param to indicate if SFE
  *                 bus RD accepted these settings
  * @res:           SFE WM/RM Resource node
  * @use_cache:     If set cache configured
@@ -152,8 +152,8 @@ struct cam_sfe_core_config_args {
  *
  */
 struct cam_isp_sfe_bus_sys_cache_config {
-	bool                                 wr_enabled;
-	bool                                 rd_enabled;
+	bool                                 wr_cfg_done;
+	bool                                 rd_cfg_done;
 	struct cam_isp_resource_node        *res;
 	bool                                 use_cache;
 	int                                  scid;

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_bus/cam_sfe_bus_rd.c

@@ -1597,7 +1597,7 @@ static int cam_sfe_bus_rd_cache_config(void *priv, void *cmd_args,
 			sfe_bus_rd_data->rm_res[i]->res_priv;
 		rm_data->enable_caching = cache_cfg->use_cache;
 		rm_data->current_scid = cache_cfg->scid;
-		cache_cfg->rd_enabled = true;
+		cache_cfg->rd_cfg_done = true;
 
 		CAM_DBG(CAM_SFE, "SFE:%d RM:%d cache_enable:%s scid:%u",
 			rm_data->common_data->core_index,

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_bus/cam_sfe_bus_wr.c

@@ -2985,7 +2985,7 @@ static int cam_sfe_bus_wr_cache_config(
 			sfe_out_data->wm_res[i].res_priv;
 		wm_data->enable_caching = cache_cfg->use_cache;
 		wm_data->current_scid = cache_cfg->scid;
-		cache_cfg->wr_enabled = true;
+		cache_cfg->wr_cfg_done = true;
 
 		CAM_DBG(CAM_SFE, "SFE:%d WM:%d cache_enable:%s scid:%u",
 			wm_data->common_data->core_index,