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asoc: codecs: remove idle detect thr func (NG)

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idle detect thr is a fixed value, do not need to change
Add debug statements in idle detect control func

Change-Id: I68a049f8560a1a444c019df2dc09f7cf62b37d46
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
This commit is contained in:
Shazmaan Ali
2022-03-31 13:33:10 -07:00
parent 7f29f390e1
commit aa3950aed3
1 changed files with 20 additions and 157 deletions
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177
asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c
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@@ -130,11 +130,6 @@ enum {
INTn_2_INP_SEL_RX8,
};
enum {
INTERP_RX0,
INTERP_RX1
};
enum {
IDLE_DETECT,
NG1,
@@ -142,11 +137,6 @@ enum {
NG3,
};
enum {
INTERP_MAIN_PATH,
INTERP_MIX_PATH,
};
static struct lpass_cdc_comp_setting comp_setting_table[G_MAX_DB] = {
{42, 0, 42},
{39, 0, 42},
@@ -164,11 +154,6 @@ struct interp_sample_rate {
int rate_val;
};
struct lpass_cdc_macro_idle_detect_config {
u8 idle_thr;
u8 idle_detect_en;
};
/*
* Structure used to update codec
* register defaults after reset
@@ -324,7 +309,7 @@ struct lpass_cdc_wsa_macro_priv {
u32 wsa_sys_gain[2 * (LPASS_CDC_WSA_MACRO_RX1 + 1)];
u32 wsa_bat_cfg[LPASS_CDC_WSA_MACRO_RX1 + 1];
u32 wsa_rload[LPASS_CDC_WSA_MACRO_RX1 + 1];
struct lpass_cdc_macro_idle_detect_config idle_detect_cfg;
u8 idle_detect_en;
int noise_gate_mode;
};
@@ -360,10 +345,6 @@ static const char *const lpass_cdc_wsa_macro_ear_spkrrecv_text[] = {
"OFF", "ON"
};
static const char * const idle_detect_text[] = {
"OFF", "ON"
};
static const char * const lpass_cdc_wsa_macro_comp_mode_text[] = {
"G_21_DB", "G_19P5_DB", "G_18_DB", "G_16P5_DB", "G_15_DB",
"G_13P5_DB", "G_12_DB", "G_10P5_DB", "G_9_DB"
@@ -383,7 +364,6 @@ static SOC_ENUM_SINGLE_EXT_DECL(lpass_cdc_wsa_macro_vbat_bcl_gsm_mode_enum,
lpass_cdc_wsa_macro_vbat_bcl_gsm_mode_text);
static SOC_ENUM_SINGLE_EXT_DECL(lpass_cdc_wsa_macro_comp_mode_enum,
lpass_cdc_wsa_macro_comp_mode_text);
static SOC_ENUM_SINGLE_EXT_DECL(idle_detect_enum, idle_detect_text);
/* RX INT0 */
static const struct soc_enum rx0_prim_inp0_chain_enum =
@@ -1276,125 +1256,6 @@ static int lpass_cdc_wsa_macro_enable_swr(struct snd_soc_dapm_widget *w,
return 0;
}
static int lpass_cdc_wsa_macro_find_playback_dai_id_for_port(int port_id,
struct lpass_cdc_wsa_macro_priv *wsa_priv)
{
int i = 0;
for (i = LPASS_CDC_WSA_MACRO_AIF1_PB; i < LPASS_CDC_WSA_MACRO_MAX_DAIS; i++) {
if (test_bit(port_id, &wsa_priv->active_ch_mask[i]))
return i;
}
return -EINVAL;
}
static int lpass_cdc_macro_set_idle_detect_thr(struct snd_soc_component *component,
int interp, int path_type)
{
int port_id[4] = { 0, 0, 0, 0 };
int *port_ptr = NULL;
int num_ports = 0;
int bit_width = 0, i = 0;
int mux_reg = 0, mux_reg_val = 0;
struct lpass_cdc_wsa_macro_priv *wsa_priv = snd_soc_component_get_drvdata(component);
int dai_id = 0, idle_thr = 0;
if ((interp != INTERP_RX0) && (interp != INTERP_RX1))
return 0;
if (!wsa_priv->idle_detect_cfg.idle_detect_en)
return 0;
port_ptr = &port_id[0];
num_ports = 0;
/*
* Read interpolator MUX input registers and find
* which cdc_dma port is connected and store the port
* numbers in port_id array.
*/
if (path_type == INTERP_MIX_PATH) {
mux_reg = LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 +
8 * interp;
mux_reg_val = snd_soc_component_read(component, mux_reg) &
0x0f;
if ((mux_reg_val >= INTn_2_INP_SEL_RX0) &&
(mux_reg_val <= INTn_2_INP_SEL_RX8)) {
*port_ptr++ = mux_reg_val - 1;
num_ports++;
}
}
if (path_type == INTERP_MAIN_PATH) {
mux_reg = LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG0 +
8 * (interp - 1);
mux_reg_val = snd_soc_component_read(component, mux_reg) &
0x0f;
i = NUM_INTERPOLATORS;
while (i) {
if ((mux_reg_val >= INTn_1_INP_SEL_RX0) &&
(mux_reg_val <= INTn_1_INP_SEL_RX8)) {
*port_ptr++ = mux_reg_val -
INTn_1_INP_SEL_RX0;
num_ports++;
}
mux_reg_val =
(snd_soc_component_read(component, mux_reg) &
0xf0) >> 4;
mux_reg += 1;
i--;
}
}
dev_dbg(component->dev, "%s: num_ports: %d, ports[%d %d %d %d]\n",
__func__, num_ports, port_id[0], port_id[1],
port_id[2], port_id[3]);
i = 0;
while (num_ports) {
dai_id = lpass_cdc_wsa_macro_find_playback_dai_id_for_port(port_id[i++],
wsa_priv);
if ((dai_id >= 0) && (dai_id < LPASS_CDC_WSA_MACRO_MAX_DAIS)) {
dev_dbg(component->dev, "%s: dai_id: %d bit_width: %d\n",
__func__, dai_id,
wsa_priv->bit_width[dai_id]);
if (wsa_priv->bit_width[dai_id] > bit_width)
bit_width = wsa_priv->bit_width[dai_id];
}
num_ports--;
}
switch (bit_width) {
case 16:
idle_thr = 0xff; /* F16 */
break;
case 24:
case 32:
idle_thr = 0x03; /* F22 */
break;
default:
idle_thr = 0x00;
break;
}
dev_dbg(component->dev, "%s: (new) idle_thr: %d, (cur) idle_thr: %d\n",
__func__, idle_thr, wsa_priv->idle_detect_cfg.idle_thr);
if ((wsa_priv->idle_detect_cfg.idle_thr == 0) ||
(idle_thr < wsa_priv->idle_detect_cfg.idle_thr)) {
snd_soc_component_write(component,
LPASS_CDC_WSA_IDLE_DETECT_CFG3, idle_thr);
wsa_priv->idle_detect_cfg.idle_thr = idle_thr;
}
return 0;
}
static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
@@ -1418,8 +1279,6 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
lpass_cdc_macro_set_idle_detect_thr(component, w->shift,
INTERP_MIX_PATH);
lpass_cdc_wsa_macro_enable_swr(w, kcontrol, event);
val = snd_soc_component_read(component, gain_reg);
val += offset_val;
@@ -1717,8 +1576,6 @@ static int lpass_cdc_wsa_macro_enable_main_path(struct snd_soc_dapm_widget *w,
LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET * w->shift;
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
lpass_cdc_macro_set_idle_detect_thr(component, w->shift,
INTERP_MAIN_PATH);
if (lpass_cdc_wsa_macro_adie_lb(component, w->shift)) {
adie_lb = true;
snd_soc_component_update_bits(component,
@@ -1815,16 +1672,19 @@ static void lpass_cdc_macro_idle_detect_control(struct snd_soc_component *compon
int reg = 0, mask = 0, val = 0, source_reg = 0;
u16 mode = 0;
if (!wsa_priv->idle_detect_cfg.idle_detect_en)
dev_dbg(component->dev, "%s: Idle_detect_en value: %d\n", __func__,
wsa_priv->idle_detect_en);
if (!wsa_priv->idle_detect_en)
return;
if (interp == INTERP_RX0) {
if (interp == LPASS_CDC_WSA_MACRO_COMP1) {
source_reg = LPASS_CDC_WSA_RX0_RX_PATH_CFG3;
reg = LPASS_CDC_WSA_IDLE_DETECT_PATH_CTL;
mask = 0x01;
val = 0x01;
}
if (interp == INTERP_RX1) {
if (interp == LPASS_CDC_WSA_MACRO_COMP2) {
source_reg = LPASS_CDC_WSA_RX1_RX_PATH_CFG3;
reg = LPASS_CDC_WSA_IDLE_DETECT_PATH_CTL;
mask = 0x02;
@@ -1835,19 +1695,24 @@ static void lpass_cdc_macro_idle_detect_control(struct snd_soc_component *compon
if ((wsa_priv->noise_gate_mode == NG2 && mode >= G_13P5_DB) ||
wsa_priv->noise_gate_mode == IDLE_DETECT || !wsa_priv->pbr_enable ||
wsa_priv->wsa_spkrrecv)
wsa_priv->wsa_spkrrecv) {
snd_soc_component_update_bits(component, source_reg, 0x80, 0x00);
else
dev_dbg(component->dev, "%s: Idle detect source: Legacy\n", __func__);
} else {
snd_soc_component_update_bits(component, source_reg, 0x80, 0x80);
dev_dbg(component->dev, "%s: Idle detect source: PRE-LA\n", __func__);
}
if (reg && SND_SOC_DAPM_EVENT_ON(event))
if (reg && SND_SOC_DAPM_EVENT_ON(event)) {
snd_soc_component_update_bits(component, reg, mask, val);
dev_dbg(component->dev, "%s: Idle detect clks ON \n", __func__);
}
if (reg && SND_SOC_DAPM_EVENT_OFF(event)) {
snd_soc_component_update_bits(component, reg, mask, 0x00);
wsa_priv->idle_detect_cfg.idle_thr = 0;
snd_soc_component_write(component,
LPASS_CDC_WSA_IDLE_DETECT_CFG3, 0x0);
dev_dbg(component->dev, "%s: Idle detect clks OFF \n", __func__);
}
}
@@ -2427,8 +2292,7 @@ static int lpass_cdc_wsa_macro_idle_detect_get(struct snd_kcontrol *kcontrol,
if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
return -EINVAL;
ucontrol->value.integer.value[0] =
wsa_priv->idle_detect_cfg.idle_detect_en;
ucontrol->value.integer.value[0] = wsa_priv->idle_detect_en;
return 0;
}
@@ -2444,8 +2308,7 @@ static int lpass_cdc_wsa_macro_idle_detect_put(struct snd_kcontrol *kcontrol,
if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
return -EINVAL;
wsa_priv->idle_detect_cfg.idle_detect_en =
ucontrol->value.integer.value[0];
wsa_priv->idle_detect_en = ucontrol->value.integer.value[0];
return 0;
}
@@ -2707,8 +2570,8 @@ static const struct snd_kcontrol_new lpass_cdc_wsa_macro_snd_controls[] = {
SOC_ENUM_EXT("WSA_RX1 comp_mode", lpass_cdc_wsa_macro_comp_mode_enum,
lpass_cdc_wsa_macro_comp_mode_get,
lpass_cdc_wsa_macro_comp_mode_put),
SOC_ENUM_EXT("Idle Detect", idle_detect_enum,
lpass_cdc_wsa_macro_idle_detect_get,
SOC_SINGLE_EXT("Idle Detect", SND_SOC_NOPM, 0, 1,
0, lpass_cdc_wsa_macro_idle_detect_get,
lpass_cdc_wsa_macro_idle_detect_put),
SOC_SINGLE_EXT("WSA_Softclip0 Enable", SND_SOC_NOPM,
LPASS_CDC_WSA_MACRO_SOFTCLIP0, 1, 0,