From a9028ef4cf65d31add760d3bfc3a83148227b9a0 Mon Sep 17 00:00:00 2001 From: Fuad Hossain Date: Wed, 5 Jun 2019 12:50:09 -0400 Subject: [PATCH] disp: msm: dp: Ensure peak pxl rate does not exceed maximum supported by sink Ensure that the dp dsc peak pxl rate does not exceed the maximum supported by the sink device. If the mode's peak pxl rate per slice exceeds the max, mark the mode as invalid. CRs-Fixed: 2325207 Change-Id: Ic8904c759b8621c3aff258206599e1994f70e26e Signed-off-by: Fuad Hossain --- msm/dp/dp_panel.c | 46 +++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 43 insertions(+), 3 deletions(-) diff --git a/msm/dp/dp_panel.c b/msm/dp/dp_panel.c index 4663c8f84f..4330e4b10c 100644 --- a/msm/dp/dp_panel.c +++ b/msm/dp/dp_panel.c @@ -1509,6 +1509,11 @@ struct dp_dsc_slices_per_line { u8 num_slices; }; +struct dp_dsc_peak_throughput { + u32 index; + u32 peak_throughput; +}; + struct dp_dsc_slices_per_line slice_per_line_tbl[] = { {0, 340, 1 }, {340, 680, 2 }, @@ -1520,6 +1525,24 @@ struct dp_dsc_slices_per_line slice_per_line_tbl[] = { {8000, 9600, 24 } }; +const struct dp_dsc_peak_throughput peak_throughput_mode_0_tbl[] = { + {0, 0}, + {1, 340}, + {2, 400}, + {3, 450}, + {4, 500}, + {5, 550}, + {6, 600}, + {7, 650}, + {8, 700}, + {9, 750}, + {10, 800}, + {11, 850}, + {12, 900}, + {13, 950}, + {14, 1000}, +}; + static int dp_panel_dsc_prepare_basic_params( struct msm_compression_info *comp_info, const struct dp_display_mode *dp_mode, @@ -1527,9 +1550,13 @@ static int dp_panel_dsc_prepare_basic_params( { int i; struct dp_dsc_slices_per_line *rec; - int slice_width; + const struct dp_dsc_peak_throughput *tput; + u32 slice_width; u32 ppr = dp_mode->timing.pixel_clk_khz/1000; - int max_slice_width; + u32 max_slice_width; + u32 ppr_max_index; + u32 peak_throughput; + u32 ppr_per_slice; comp_info->dsc_info.slice_per_pkt = 0; for (i = 0; i < ARRAY_SIZE(slice_per_line_tbl); i++) { @@ -1544,11 +1571,23 @@ static int dp_panel_dsc_prepare_basic_params( if (comp_info->dsc_info.slice_per_pkt == 0) return -EINVAL; + ppr_max_index = dp_panel->dsc_dpcd[11] &= 0xf; + if (!ppr_max_index || ppr_max_index >= 15) { + pr_debug("Throughput mode 0 not supported"); + return -EINVAL; + } + + tput = &peak_throughput_mode_0_tbl[ppr_max_index]; + peak_throughput = tput->peak_throughput; + max_slice_width = dp_panel->dsc_dpcd[12] * 320; slice_width = (dp_mode->timing.h_active / comp_info->dsc_info.slice_per_pkt); - while (slice_width >= max_slice_width) { + ppr_per_slice = ppr/comp_info->dsc_info.slice_per_pkt; + + while (slice_width >= max_slice_width || + ppr_per_slice > peak_throughput) { if (i == ARRAY_SIZE(slice_per_line_tbl)) return -EINVAL; @@ -1556,6 +1595,7 @@ static int dp_panel_dsc_prepare_basic_params( comp_info->dsc_info.slice_per_pkt = rec->num_slices; slice_width = (dp_mode->timing.h_active / comp_info->dsc_info.slice_per_pkt); + ppr_per_slice = ppr/comp_info->dsc_info.slice_per_pkt; i++; }