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soc: soundwire: Ungate the swr rx ports

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In soundwire version 1.7, rx soundwire port2/3
are extended to 32bits to use as PCM port too.
When using for PDM port as well, need to ungate
the ports for functionality to work.

Change-Id: I1815a9337ab21e0000ca7dbfeaac4c01dadec0dc
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam
2021-02-25 18:00:22 +05:30
parent 9d0e5be6b5
commit a87c793e30
5 changed files with 38 additions and 27 deletions
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20
asoc/codecs/lpass-cdc/lpass-cdc-registers.h
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@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*/ */
#ifndef _LPASS_CDC_REGISTERS_H #ifndef _LPASS_CDC_REGISTERS_H
@@ -433,15 +433,15 @@
#define LPASS_CDC_RX_COMPANDER0_CTL6 (RX_START_OFFSET + 0x0818) #define LPASS_CDC_RX_COMPANDER0_CTL6 (RX_START_OFFSET + 0x0818)
#define LPASS_CDC_RX_COMPANDER0_CTL7 (RX_START_OFFSET + 0x081C) #define LPASS_CDC_RX_COMPANDER0_CTL7 (RX_START_OFFSET + 0x081C)
#define LPASS_CDC_RX_COMPANDER0_CTL8 (RX_START_OFFSET + 0x0820) #define LPASS_CDC_RX_COMPANDER0_CTL8 (RX_START_OFFSET + 0x0820)
#define LPASS_CDC_RX_COMPANDER0_CTL9 (RX_START_OFFSET + 0x0820) #define LPASS_CDC_RX_COMPANDER0_CTL9 (RX_START_OFFSET + 0x0824)
#define LPASS_CDC_RX_COMPANDER0_CTL10 (RX_START_OFFSET + 0x0824) #define LPASS_CDC_RX_COMPANDER0_CTL10 (RX_START_OFFSET + 0x0828)
#define LPASS_CDC_RX_COMPANDER0_CTL11 (RX_START_OFFSET + 0x0828) #define LPASS_CDC_RX_COMPANDER0_CTL11 (RX_START_OFFSET + 0x082C)
#define LPASS_CDC_RX_COMPANDER0_CTL12 (RX_START_OFFSET + 0x082C) #define LPASS_CDC_RX_COMPANDER0_CTL12 (RX_START_OFFSET + 0x0830)
#define LPASS_CDC_RX_COMPANDER0_CTL13 (RX_START_OFFSET + 0x0830) #define LPASS_CDC_RX_COMPANDER0_CTL13 (RX_START_OFFSET + 0x0834)
#define LPASS_CDC_RX_COMPANDER0_CTL14 (RX_START_OFFSET + 0x0834) #define LPASS_CDC_RX_COMPANDER0_CTL14 (RX_START_OFFSET + 0x0838)
#define LPASS_CDC_RX_COMPANDER0_CTL15 (RX_START_OFFSET + 0x0838) #define LPASS_CDC_RX_COMPANDER0_CTL15 (RX_START_OFFSET + 0x083C)
#define LPASS_CDC_RX_COMPANDER0_CTL16 (RX_START_OFFSET + 0x083C) #define LPASS_CDC_RX_COMPANDER0_CTL16 (RX_START_OFFSET + 0x0840)
#define LPASS_CDC_RX_COMPANDER0_CTL17 (RX_START_OFFSET + 0x0840) #define LPASS_CDC_RX_COMPANDER0_CTL17 (RX_START_OFFSET + 0x0844)
#define LPASS_CDC_RX_COMPANDER0_CTL18 (RX_START_OFFSET + 0x0848) #define LPASS_CDC_RX_COMPANDER0_CTL18 (RX_START_OFFSET + 0x0848)
#define LPASS_CDC_RX_COMPANDER0_CTL19 (RX_START_OFFSET + 0x084C) #define LPASS_CDC_RX_COMPANDER0_CTL19 (RX_START_OFFSET + 0x084C)
#define LPASS_CDC_RX_COMPANDER1_CTL0 (RX_START_OFFSET + 0x0860) #define LPASS_CDC_RX_COMPANDER1_CTL0 (RX_START_OFFSET + 0x0860)

4
asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c
View File

@@ -989,7 +989,7 @@ static int lpass_cdc_rx_macro_set_prim_interpolator_rate(struct snd_soc_dai *dai
(inp1_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) || (inp1_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0) ||
(inp2_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0)) { (inp2_sel == int_1_mix1_inp + INTn_1_INP_SEL_RX0)) {
int_fs_reg = LPASS_CDC_RX_RX0_RX_PATH_CTL + int_fs_reg = LPASS_CDC_RX_RX0_RX_PATH_CTL +
0x80 * j; LPASS_CDC_RX_MACRO_RX_PATH_OFFSET * j;
pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_1\n", pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_1\n",
__func__, dai->id, j); __func__, dai->id, j);
pr_debug("%s: set INT%u_1 sample rate to %u\n", pr_debug("%s: set INT%u_1 sample rate to %u\n",
@@ -1039,7 +1039,7 @@ static int lpass_cdc_rx_macro_set_mix_interpolator_rate(struct snd_soc_dai *dai,
if (int_mux_cfg1_val == int_2_inp + if (int_mux_cfg1_val == int_2_inp +
INTn_2_INP_SEL_RX0) { INTn_2_INP_SEL_RX0) {
int_fs_reg = LPASS_CDC_RX_RX0_RX_PATH_MIX_CTL + int_fs_reg = LPASS_CDC_RX_RX0_RX_PATH_MIX_CTL +
0x80 * j; LPASS_CDC_RX_MACRO_RX_PATH_OFFSET * j;
pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_2\n", pr_debug("%s: AIF_PB DAI(%d) connected to INT%u_2\n",
__func__, dai->id, j); __func__, dai->id, j);
pr_debug("%s: set INT%u_2 sample rate to %u\n", pr_debug("%s: set INT%u_2 sample rate to %u\n",

12
asoc/waipio-port-config.h
View File

@@ -28,8 +28,8 @@ static struct port_params wsa_frame_params_default[SWR_MSTR_PORT_LEN] = {
static struct port_params rx_frame_params_dsd[SWR_MSTR_PORT_LEN] = { static struct port_params rx_frame_params_dsd[SWR_MSTR_PORT_LEN] = {
{3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00},
{31, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x00}, {31, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x02},
{31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x00}, {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x02},
{7, 9, 0, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0, 0x00, 0x00}, {7, 9, 0, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0, 0x00, 0x00},
{3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 3, 0, 0x00, 0x00}, {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 3, 0, 0x00, 0x00},
}; };
@@ -37,8 +37,8 @@ static struct port_params rx_frame_params_dsd[SWR_MSTR_PORT_LEN] = {
/* Headset + PCM Haptics */ /* Headset + PCM Haptics */
static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = { static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = {
{3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */ {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */
{31, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x00}, /* HPH_CLH */ {31, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x02}, /* HPH_CLH */
{31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x00}, /* HPH_CMP */ {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x02}, /* HPH_CMP */
{7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* LO/AUX */ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* LO/AUX */
{0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */ {0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */
{0x18F, 0, 0, 0x8, 0x8, 0x0F, 0x00, 0, 0, 0x00, 0x01}, /* PCM_OUT */ {0x18F, 0, 0, 0x8, 0x8, 0x0F, 0x00, 0, 0, 0x00, 0x01}, /* PCM_OUT */
@@ -47,8 +47,8 @@ static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = {
/* Headset(44.1K) + PCM Haptics */ /* Headset(44.1K) + PCM Haptics */
static struct port_params rx_frame_params_44p1KHz[SWR_MSTR_PORT_LEN] = { static struct port_params rx_frame_params_44p1KHz[SWR_MSTR_PORT_LEN] = {
{3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */ {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1, 0x00, 0x00}, /* HPH/EAR */
{63, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x00}, /* HPH_CLH */ {63, 0, 0, 3, 6, 7, 0, 0xFF, 0, 0x00, 0x02}, /* HPH_CLH */
{31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x00}, /* HPH_CMP */ {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0, 0x00, 0x02}, /* HPH_CMP */
{3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0, 0x00, 0x00}, /* LO/AUX */ {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0, 0x00, 0x00}, /* LO/AUX */
{0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */ {0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0x00, 0x00}, /* DSD */
{0x1FF, 0, 0, 0x8, 0x8, 0x0F, 0, 0, 0, 0x00, 0x01}, /* PCM_OUT */ {0x1FF, 0, 0, 0x8, 0x8, 0x0F, 0, 0, 0, 0x00, 0x01}, /* PCM_OUT */

26
soc/swr-mstr-ctrl.c
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/ */
#include <linux/irq.h> #include <linux/irq.h>
@@ -739,7 +739,7 @@ static int swrm_get_port_config(struct swr_mstr_ctrl *swrm)
} }
static int swrm_pcm_port_config(struct swr_mstr_ctrl *swrm, u8 port_num, static int swrm_pcm_port_config(struct swr_mstr_ctrl *swrm, u8 port_num,
bool dir, bool enable) u8 stream_type, bool dir, bool enable)
{ {
u16 reg_addr = 0; u16 reg_addr = 0;
u32 reg_val = SWRM_COMP_FEATURE_CFG_DEFAULT_VAL; u32 reg_val = SWRM_COMP_FEATURE_CFG_DEFAULT_VAL;
@@ -749,9 +749,19 @@ static int swrm_pcm_port_config(struct swr_mstr_ctrl *swrm, u8 port_num,
__func__, port_num); __func__, port_num);
return -EINVAL; return -EINVAL;
} }
reg_addr = ((dir) ? SWRM_DIN_DP_PCM_PORT_CTRL(port_num) : \
switch (stream_type) {
case SWR_PCM:
reg_addr = ((dir) ? SWRM_DIN_DP_PCM_PORT_CTRL(port_num) : \
SWRM_DOUT_DP_PCM_PORT_CTRL(port_num)); SWRM_DOUT_DP_PCM_PORT_CTRL(port_num));
swr_master_write(swrm, reg_addr, enable); swr_master_write(swrm, reg_addr, enable);
break;
case SWR_PDM_32:
break;
case SWR_PDM:
default:
return 0;
}
if (swrm->version >= SWRM_VERSION_1_7) if (swrm->version >= SWRM_VERSION_1_7)
reg_val = SWRM_COMP_FEATURE_CFG_DEFAULT_VAL_V1P7; reg_val = SWRM_COMP_FEATURE_CFG_DEFAULT_VAL_V1P7;
@@ -1266,8 +1276,8 @@ static void swrm_disable_ports(struct swr_master *master,
__func__, i, __func__, i,
(SWRM_DP_PORT_CTRL_BANK((i + 1), bank)), value); (SWRM_DP_PORT_CTRL_BANK((i + 1), bank)), value);
if (mport->stream_type == SWR_PCM) swrm_pcm_port_config(swrm, (i + 1),
swrm_pcm_port_config(swrm, (i + 1), mport->dir, false); mport->stream_type, mport->dir, false);
} }
} }
@@ -1416,8 +1426,8 @@ static void swrm_copy_data_port_config(struct swr_master *master, u8 bank)
if (!mport->port_en) if (!mport->port_en)
continue; continue;
if (mport->stream_type == SWR_PCM) swrm_pcm_port_config(swrm, (i + 1),
swrm_pcm_port_config(swrm, (i + 1), mport->dir, true); mport->stream_type, mport->dir, true);
j = 0; j = 0;
lane_ctrl = 0; lane_ctrl = 0;
sinterval = 0xFFFF; sinterval = 0xFFFF;

3
soc/swr-mstr-ctrl.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/ */
#ifndef _SWR_WCD_CTRL_H #ifndef _SWR_WCD_CTRL_H
@@ -75,6 +75,7 @@ enum {
enum { enum {
SWR_PDM = 0, SWR_PDM = 0,
SWR_PCM, SWR_PCM,
SWR_PDM_32,
}; };
struct usecase { struct usecase {