Merge "asoc: codecs: Add delay to eliminate playback pause post SSR on hs"
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a77e7d4be8
@@ -83,6 +83,8 @@ struct rouleur_priv {
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int mbias_cnt;
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int mbias_cnt;
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struct mutex rx_clk_lock;
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struct mutex rx_clk_lock;
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struct mutex main_bias_lock;
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struct mutex main_bias_lock;
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bool dev_up;
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bool usbc_hs_status;
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};
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};
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struct rouleur_micbias_setting {
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struct rouleur_micbias_setting {
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@@ -170,4 +172,6 @@ extern int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
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extern int rouleur_get_micb_vout_ctl_val(u32 micb_mv);
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extern int rouleur_get_micb_vout_ctl_val(u32 micb_mv);
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extern int rouleur_micbias_control(struct snd_soc_component *component,
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extern int rouleur_micbias_control(struct snd_soc_component *component,
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int micb_num, int req, bool is_dapm);
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int micb_num, int req, bool is_dapm);
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extern int rouleur_global_mbias_enable(struct snd_soc_component *component);
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extern int rouleur_global_mbias_disable(struct snd_soc_component *component);
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#endif
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#endif
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@@ -22,20 +22,19 @@
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#define ROULEUR_ZDET_SUPPORTED true
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#define ROULEUR_ZDET_SUPPORTED true
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/* Z value defined in milliohm */
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/* Z value defined in milliohm */
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#define ROULEUR_ZDET_VAL_32 32000
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#define ROULEUR_ZDET_VAL_400 400000
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#define ROULEUR_ZDET_VAL_1200 1200000
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#define ROULEUR_ZDET_VAL_100K 100000000
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#define ROULEUR_ZDET_VAL_100K 100000000
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/* Z floating defined in ohms */
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/* Z floating defined in ohms */
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#define ROULEUR_ZDET_FLOATING_IMPEDANCE 0x0FFFFFFE
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#define ROULEUR_ZDET_FLOATING_IMPEDANCE 0x0FFFFFFE
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#define ROULEUR_ZDET_NUM_MEASUREMENTS 900
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#define ROULEUR_ZDET_NUM_MEASUREMENTS 100
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#define ROULEUR_MBHC_GET_C1(c) ((c & 0xC000) >> 14)
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#define ROULEUR_ZDET_RMAX 1280000
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#define ROULEUR_MBHC_GET_X1(x) (x & 0x3FFF)
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#define ROULEUR_ZDET_C1 7500000
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/* Z value compared in milliOhm */
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#define ROULEUR_ZDET_C2 187
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#define ROULEUR_MBHC_IS_SECOND_RAMP_REQUIRED(z) ((z > 400000) || (z < 32000))
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#define ROULEUR_ZDET_C3 4500
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#define ROULEUR_MBHC_ZDET_CONST (86 * 16384)
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#define ROULEUR_MBHC_MOISTURE_RREF R_24_KOHM
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/* Cross connection thresholds in mV */
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#define ROULEUR_HPHL_CROSS_CONN_THRESHOLD 200
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#define ROULEUR_HPHR_CROSS_CONN_THRESHOLD 200
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static struct wcd_mbhc_register
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static struct wcd_mbhc_register
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wcd_mbhc_registers[WCD_MBHC_REG_FUNC_MAX] = {
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wcd_mbhc_registers[WCD_MBHC_REG_FUNC_MAX] = {
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@@ -153,9 +152,6 @@ struct rouleur_mbhc_zdet_param {
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u16 ldo_ctl;
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u16 ldo_ctl;
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u16 noff;
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u16 noff;
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u16 nshift;
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u16 nshift;
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u16 btn5;
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u16 btn6;
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u16 btn7;
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};
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};
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static int rouleur_mbhc_request_irq(struct snd_soc_component *component,
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static int rouleur_mbhc_request_irq(struct snd_soc_component *component,
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@@ -320,11 +316,11 @@ static void rouleur_mbhc_micb_ramp_control(struct snd_soc_component *component,
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0x1C, 0x0C);
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0x1C, 0x0C);
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snd_soc_component_update_bits(component,
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snd_soc_component_update_bits(component,
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ROULEUR_ANA_MBHC_MICB2_RAMP,
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ROULEUR_ANA_MBHC_MICB2_RAMP,
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0xA0, 0x80);
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0x80, 0x80);
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} else {
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} else {
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snd_soc_component_update_bits(component,
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snd_soc_component_update_bits(component,
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ROULEUR_ANA_MBHC_MICB2_RAMP,
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ROULEUR_ANA_MBHC_MICB2_RAMP,
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0xA0, 0x00);
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0x80, 0x00);
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snd_soc_component_update_bits(component,
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snd_soc_component_update_bits(component,
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ROULEUR_ANA_MBHC_MICB2_RAMP,
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ROULEUR_ANA_MBHC_MICB2_RAMP,
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0x1C, 0x00);
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0x1C, 0x00);
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@@ -376,174 +372,180 @@ static int rouleur_mbhc_micb_ctrl_threshold_mic(
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return rc;
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return rc;
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}
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}
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static inline void rouleur_mbhc_get_result_params(struct rouleur_priv *rouleur,
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static void rouleur_mbhc_get_result_params(struct rouleur_priv *rouleur,
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s16 *d1_a, u16 noff,
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struct snd_soc_component *component,
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int32_t *zdet)
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int32_t *zdet)
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{
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{
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int i;
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int i;
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int val = 0, val1 = 0;
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int zcode = 0, zcode1 = 0, zdet_cal_result = 0, zdet_est_range = 0;
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s16 c1 = 0;
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int noff = 0, ndac = 14;
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s32 x1 = 0, d1 = 0;
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int zdet_cal_coeff = 0, div_ratio = 0;
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int32_t denom;
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int num = 0, denom = 0;
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int minCode_param[] = {
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3277, 1639, 820, 410, 205, 103, 52, 26
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};
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/* Charge enable and wait for zcode to be updated */
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regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MBHC_ZDET, 0x20, 0x20);
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regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MBHC_ZDET, 0x20, 0x20);
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for (i = 0; i < ROULEUR_ZDET_NUM_MEASUREMENTS; i++) {
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for (i = 0; i < ROULEUR_ZDET_NUM_MEASUREMENTS; i++) {
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regmap_read(rouleur->regmap, ROULEUR_ANA_MBHC_RESULT_2, &val);
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regmap_read(rouleur->regmap, ROULEUR_ANA_MBHC_RESULT_2, &zcode);
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if (val & 0x80)
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if (zcode & 0x80)
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break;
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break;
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usleep_range(200, 210);
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}
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}
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val = val << 0x8;
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regmap_read(rouleur->regmap, ROULEUR_ANA_MBHC_RESULT_1, &val1);
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val |= val1;
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regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MBHC_ZDET, 0x20, 0x00);
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x1 = ROULEUR_MBHC_GET_X1(val);
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c1 = ROULEUR_MBHC_GET_C1(val);
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/* If ramp is not complete, give additional 5ms */
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if ((c1 < 2) && x1)
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usleep_range(5000, 5050);
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if (!c1 || !x1) {
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/* If zcode updation is not complete, give additional 10ms */
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if (!(zcode & 0x80))
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usleep_range(10000, 10100);
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regmap_read(rouleur->regmap, ROULEUR_ANA_MBHC_RESULT_2, &zcode);
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if (!(zcode & 0x80)) {
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dev_dbg(rouleur->dev,
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dev_dbg(rouleur->dev,
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"%s: Impedance detect ramp error, c1=%d, x1=0x%x\n",
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"%s: Impedance detect calculation error, zcode=0x%x\n",
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__func__, c1, x1);
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__func__, zcode);
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goto ramp_down;
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regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MBHC_ZDET,
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0x20, 0x00);
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return;
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}
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}
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d1 = d1_a[c1];
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zcode = zcode << 0x8;
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denom = (x1 * d1) - (1 << (14 - noff));
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zcode = zcode & 0x3FFF;
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regmap_read(rouleur->regmap, ROULEUR_ANA_MBHC_RESULT_1, &zcode1);
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zcode |= zcode1;
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dev_dbg(rouleur->dev,
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"%s: zcode: %d, zcode1: %d\n", __func__, zcode, zcode1);
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/* Calculate calibration coefficient */
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zdet_cal_result = (snd_soc_component_read32(component,
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ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT)) & 0x1F;
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zdet_cal_coeff = ROULEUR_ZDET_C1 /
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((ROULEUR_ZDET_C2 * zdet_cal_result) + ROULEUR_ZDET_C3);
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/* Rload calculation */
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zdet_est_range = (snd_soc_component_read32(component,
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ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT) & 0x60) >> 5;
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dev_dbg(rouleur->dev,
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"%s: zdet_cal_result: %d, zdet_cal_coeff: %d, zdet_est_range: %d\n",
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__func__, zdet_cal_result, zdet_cal_coeff, zdet_est_range);
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switch (zdet_est_range) {
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case 0:
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default:
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noff = 0;
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div_ratio = 320;
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break;
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case 1:
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noff = 0;
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div_ratio = 64;
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break;
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case 2:
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noff = 4;
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div_ratio = 64;
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break;
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case 3:
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noff = 5;
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div_ratio = 40;
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break;
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}
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num = zdet_cal_coeff * ROULEUR_ZDET_RMAX;
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denom = ((zcode * div_ratio * 100) - (1 << (ndac - noff)) * 1000);
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dev_dbg(rouleur->dev,
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"%s: num: %d, denom: %d\n", __func__, num, denom);
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if (denom > 0)
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if (denom > 0)
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*zdet = (ROULEUR_MBHC_ZDET_CONST * 1000) / denom;
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*zdet = (int32_t) ((num / denom) * 1000);
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else if (x1 < minCode_param[noff])
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else
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*zdet = ROULEUR_ZDET_FLOATING_IMPEDANCE;
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*zdet = ROULEUR_ZDET_FLOATING_IMPEDANCE;
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dev_dbg(rouleur->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%d(milliOhm)\n",
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dev_dbg(rouleur->dev, "%s: z_val=%d(milliOhm)\n",
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__func__, d1, c1, x1, *zdet);
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__func__, *zdet);
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ramp_down:
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/* Start discharge */
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i = 0;
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regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MBHC_ZDET, 0x20, 0x00);
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while (x1) {
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regmap_read(rouleur->regmap, ROULEUR_ANA_MBHC_RESULT_1, &val);
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regmap_read(rouleur->regmap, ROULEUR_ANA_MBHC_RESULT_2, &val1);
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val = val << 0x8;
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val |= val1;
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x1 = ROULEUR_MBHC_GET_X1(val);
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i++;
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if (i == ROULEUR_ZDET_NUM_MEASUREMENTS)
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break;
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}
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}
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}
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#if 0
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static void rouleur_mbhc_zdet_start(struct snd_soc_component *component,
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static void rouleur_mbhc_zdet_ramp(struct snd_soc_component *component,
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int32_t *zl, int32_t *zr)
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struct rouleur_mbhc_zdet_param *zdet_param,
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int32_t *zl, int32_t *zr, s16 *d1_a)
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{
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{
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struct rouleur_priv *rouleur = dev_get_drvdata(component->dev);
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struct rouleur_priv *rouleur = dev_get_drvdata(component->dev);
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int32_t zdet = 0;
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int32_t zdet = 0;
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snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_ZDET_ANA_CTL,
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0x70, zdet_param->ldo_ctl << 4);
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snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_BTN5, 0xFC,
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zdet_param->btn5);
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snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_BTN6, 0xFC,
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zdet_param->btn6);
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snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_BTN7, 0xFC,
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zdet_param->btn7);
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snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_ZDET_ANA_CTL,
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0x0F, zdet_param->noff);
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snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_ZDET_RAMP_CTL,
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0x0F, zdet_param->nshift);
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if (!zl)
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if (!zl)
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goto z_right;
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goto z_right;
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/* Start impedance measurement for HPH_L */
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/* HPHL pull down switch to force OFF */
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_HPHPA_CNP_CTL_2, 0x30, 0x00);
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/* Averaging enable for reliable results */
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET_ANA_CTL, 0x80, 0x80);
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/* ZDET left measurement enable */
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regmap_update_bits(rouleur->regmap,
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET, 0x80, 0x80);
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ROULEUR_ANA_MBHC_ZDET, 0x80, 0x80);
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dev_dbg(rouleur->dev, "%s: ramp for HPH_L, noff = %d\n",
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/* Calculate the left Rload result */
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__func__, zdet_param->noff);
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rouleur_mbhc_get_result_params(rouleur, component, &zdet);
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rouleur_mbhc_get_result_params(rouleur, d1_a, zdet_param->noff, &zdet);
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regmap_update_bits(rouleur->regmap,
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET, 0x80, 0x00);
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ROULEUR_ANA_MBHC_ZDET, 0x80, 0x00);
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET_ANA_CTL, 0x80, 0x00);
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_HPHPA_CNP_CTL_2, 0x30, 0x20);
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*zl = zdet;
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*zl = zdet;
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z_right:
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z_right:
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if (!zr)
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if (!zr)
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return;
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return;
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/* Start impedance measurement for HPH_R */
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/* HPHR pull down switch to force OFF */
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_HPHPA_CNP_CTL_2, 0x0C, 0x00);
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/* Averaging enable for reliable results */
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET_ANA_CTL, 0x80, 0x80);
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/* ZDET right measurement enable */
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regmap_update_bits(rouleur->regmap,
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET, 0x40, 0x40);
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ROULEUR_ANA_MBHC_ZDET, 0x40, 0x40);
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dev_dbg(rouleur->dev, "%s: ramp for HPH_R, noff = %d\n",
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__func__, zdet_param->noff);
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/* Calculate the right Rload result */
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rouleur_mbhc_get_result_params(rouleur, d1_a, zdet_param->noff, &zdet);
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rouleur_mbhc_get_result_params(rouleur, component, &zdet);
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|
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regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET, 0x40, 0x00);
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ROULEUR_ANA_MBHC_ZDET, 0x40, 0x00);
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_MBHC_ZDET_ANA_CTL, 0x80, 0x00);
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regmap_update_bits(rouleur->regmap,
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ROULEUR_ANA_HPHPA_CNP_CTL_2, 0x0C, 0x08);
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*zr = zdet;
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*zr = zdet;
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}
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}
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static inline void rouleur_wcd_mbhc_qfuse_cal(
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struct snd_soc_component *component,
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int32_t *z_val, int flag_l_r)
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{
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s16 q1;
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int q1_cal;
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if (*z_val < (ROULEUR_ZDET_VAL_400/1000))
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q1 = snd_soc_component_read32(component,
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ROULEUR_DIGITAL_EFUSE_REG_23 + (2 * flag_l_r));
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else
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q1 = snd_soc_component_read32(component,
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ROULEUR_DIGITAL_EFUSE_REG_24 + (2 * flag_l_r));
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if (q1 & 0x80)
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q1_cal = (10000 - ((q1 & 0x7F) * 25));
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else
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q1_cal = (10000 + (q1 * 25));
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if (q1_cal > 0)
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*z_val = ((*z_val) * 10000) / q1_cal;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void rouleur_wcd_mbhc_calc_impedance(struct wcd_mbhc *mbhc, uint32_t *zl,
|
static void rouleur_wcd_mbhc_calc_impedance(struct wcd_mbhc *mbhc, uint32_t *zl,
|
||||||
uint32_t *zr)
|
uint32_t *zr)
|
||||||
{
|
{
|
||||||
struct snd_soc_component *component = mbhc->component;
|
struct snd_soc_component *component = mbhc->component;
|
||||||
struct rouleur_priv *rouleur = dev_get_drvdata(component->dev);
|
struct rouleur_priv *rouleur = dev_get_drvdata(component->dev);
|
||||||
s16 reg0, reg1, reg2, reg3, reg4;
|
s16 reg0;
|
||||||
int32_t z1L, z1R, z1Ls;
|
int32_t z1L, z1R, z1Ls;
|
||||||
int zMono, z_diff1, z_diff2;
|
int zMono, z_diff1, z_diff2;
|
||||||
bool is_fsm_disable = false;
|
bool is_fsm_disable = false;
|
||||||
struct rouleur_mbhc_zdet_param zdet_param[] = {
|
|
||||||
{4, 0, 4, 0x08, 0x14, 0x18}, /* < 32ohm */
|
|
||||||
{2, 0, 3, 0x18, 0x7C, 0x90}, /* 32ohm < Z < 400ohm */
|
|
||||||
{1, 4, 5, 0x18, 0x7C, 0x90}, /* 400ohm < Z < 1200ohm */
|
|
||||||
{1, 6, 7, 0x18, 0x7C, 0x90}, /* >1200ohm */
|
|
||||||
};
|
|
||||||
struct rouleur_mbhc_zdet_param *zdet_param_ptr = NULL;
|
|
||||||
s16 d1_a[][4] = {
|
|
||||||
{0, 30, 90, 30},
|
|
||||||
{0, 30, 30, 5},
|
|
||||||
{0, 30, 30, 5},
|
|
||||||
{0, 30, 30, 5},
|
|
||||||
};
|
|
||||||
s16 *d1 = NULL;
|
|
||||||
|
|
||||||
WCD_MBHC_RSC_ASSERT_LOCKED(mbhc);
|
WCD_MBHC_RSC_ASSERT_LOCKED(mbhc);
|
||||||
|
|
||||||
reg0 = snd_soc_component_read32(component, ROULEUR_ANA_MBHC_BTN5);
|
reg0 = snd_soc_component_read32(component, ROULEUR_ANA_MBHC_ELECT);
|
||||||
reg1 = snd_soc_component_read32(component, ROULEUR_ANA_MBHC_BTN6);
|
|
||||||
reg2 = snd_soc_component_read32(component, ROULEUR_ANA_MBHC_BTN7);
|
|
||||||
reg3 = snd_soc_component_read32(component, ROULEUR_MBHC_CTL_CLK);
|
|
||||||
reg4 = snd_soc_component_read32(component,
|
|
||||||
ROULEUR_ANA_MBHC_ZDET_ANA_CTL);
|
|
||||||
|
|
||||||
if (snd_soc_component_read32(component, ROULEUR_ANA_MBHC_ELECT) &
|
if (reg0 & 0x80) {
|
||||||
0x80) {
|
|
||||||
is_fsm_disable = true;
|
is_fsm_disable = true;
|
||||||
regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
|
||||||
ROULEUR_ANA_MBHC_ELECT, 0x80, 0x00);
|
ROULEUR_ANA_MBHC_ELECT, 0x80, 0x00);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Enable electrical bias */
|
||||||
|
snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_ELECT,
|
||||||
|
0x01, 0x01);
|
||||||
|
|
||||||
|
/* Enable codec main bias */
|
||||||
|
rouleur_global_mbias_enable(component);
|
||||||
|
|
||||||
|
/* Enable RCO clock */
|
||||||
|
snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_CTL_1,
|
||||||
|
0x80, 0x80);
|
||||||
|
|
||||||
/* For NO-jack, disable L_DET_EN before Z-det measurements */
|
/* For NO-jack, disable L_DET_EN before Z-det measurements */
|
||||||
if (mbhc->hphl_swh)
|
if (mbhc->hphl_swh)
|
||||||
regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
|
||||||
@@ -553,79 +555,34 @@ static void rouleur_wcd_mbhc_calc_impedance(struct wcd_mbhc *mbhc, uint32_t *zl,
|
|||||||
regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
|
||||||
ROULEUR_ANA_MBHC_MECH, 0x01, 0x00);
|
ROULEUR_ANA_MBHC_MECH, 0x01, 0x00);
|
||||||
|
|
||||||
/* Disable surge protection before impedance detection.
|
/*
|
||||||
|
* Disable surge protection before impedance detection.
|
||||||
* This is done to give correct value for high impedance.
|
* This is done to give correct value for high impedance.
|
||||||
*/
|
*/
|
||||||
regmap_update_bits(rouleur->regmap,
|
snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
|
||||||
ROULEUR_HPH_SURGE_HPHLR_SURGE_EN, 0xC0, 0x00);
|
0xC0, 0x00);
|
||||||
/* 1ms delay needed after disable surge protection */
|
/* 1ms delay needed after disable surge protection */
|
||||||
usleep_range(1000, 1010);
|
usleep_range(1000, 1010);
|
||||||
|
|
||||||
/* First get impedance on Left */
|
/* Start of left ch impedance calculation */
|
||||||
d1 = d1_a[1];
|
rouleur_mbhc_zdet_start(component, &z1L, NULL);
|
||||||
zdet_param_ptr = &zdet_param[1];
|
|
||||||
rouleur_mbhc_zdet_ramp(component, zdet_param_ptr, &z1L, NULL, d1);
|
|
||||||
|
|
||||||
if (!ROULEUR_MBHC_IS_SECOND_RAMP_REQUIRED(z1L))
|
|
||||||
goto left_ch_impedance;
|
|
||||||
|
|
||||||
/* Second ramp for left ch */
|
|
||||||
if (z1L < ROULEUR_ZDET_VAL_32) {
|
|
||||||
zdet_param_ptr = &zdet_param[0];
|
|
||||||
d1 = d1_a[0];
|
|
||||||
} else if ((z1L > ROULEUR_ZDET_VAL_400) &&
|
|
||||||
(z1L <= ROULEUR_ZDET_VAL_1200)) {
|
|
||||||
zdet_param_ptr = &zdet_param[2];
|
|
||||||
d1 = d1_a[2];
|
|
||||||
} else if (z1L > ROULEUR_ZDET_VAL_1200) {
|
|
||||||
zdet_param_ptr = &zdet_param[3];
|
|
||||||
d1 = d1_a[3];
|
|
||||||
}
|
|
||||||
rouleur_mbhc_zdet_ramp(component, zdet_param_ptr, &z1L, NULL, d1);
|
|
||||||
|
|
||||||
left_ch_impedance:
|
|
||||||
if ((z1L == ROULEUR_ZDET_FLOATING_IMPEDANCE) ||
|
if ((z1L == ROULEUR_ZDET_FLOATING_IMPEDANCE) ||
|
||||||
(z1L > ROULEUR_ZDET_VAL_100K)) {
|
(z1L > ROULEUR_ZDET_VAL_100K))
|
||||||
*zl = ROULEUR_ZDET_FLOATING_IMPEDANCE;
|
*zl = ROULEUR_ZDET_FLOATING_IMPEDANCE;
|
||||||
zdet_param_ptr = &zdet_param[1];
|
else
|
||||||
d1 = d1_a[1];
|
|
||||||
} else {
|
|
||||||
*zl = z1L/1000;
|
*zl = z1L/1000;
|
||||||
rouleur_wcd_mbhc_qfuse_cal(component, zl, 0);
|
|
||||||
}
|
|
||||||
dev_dbg(component->dev, "%s: impedance on HPH_L = %d(ohms)\n",
|
dev_dbg(component->dev, "%s: impedance on HPH_L = %d(ohms)\n",
|
||||||
__func__, *zl);
|
__func__, *zl);
|
||||||
|
|
||||||
/* Start of right impedance ramp and calculation */
|
/* Start of right ch impedance calculation */
|
||||||
rouleur_mbhc_zdet_ramp(component, zdet_param_ptr, NULL, &z1R, d1);
|
rouleur_mbhc_zdet_start(component, NULL, &z1R);
|
||||||
if (ROULEUR_MBHC_IS_SECOND_RAMP_REQUIRED(z1R)) {
|
|
||||||
if (((z1R > ROULEUR_ZDET_VAL_1200) &&
|
|
||||||
(zdet_param_ptr->noff == 0x6)) ||
|
|
||||||
((*zl) != ROULEUR_ZDET_FLOATING_IMPEDANCE))
|
|
||||||
goto right_ch_impedance;
|
|
||||||
/* Second ramp for right ch */
|
|
||||||
if (z1R < ROULEUR_ZDET_VAL_32) {
|
|
||||||
zdet_param_ptr = &zdet_param[0];
|
|
||||||
d1 = d1_a[0];
|
|
||||||
} else if ((z1R > ROULEUR_ZDET_VAL_400) &&
|
|
||||||
(z1R <= ROULEUR_ZDET_VAL_1200)) {
|
|
||||||
zdet_param_ptr = &zdet_param[2];
|
|
||||||
d1 = d1_a[2];
|
|
||||||
} else if (z1R > ROULEUR_ZDET_VAL_1200) {
|
|
||||||
zdet_param_ptr = &zdet_param[3];
|
|
||||||
d1 = d1_a[3];
|
|
||||||
}
|
|
||||||
rouleur_mbhc_zdet_ramp(component, zdet_param_ptr, NULL,
|
|
||||||
&z1R, d1);
|
|
||||||
}
|
|
||||||
right_ch_impedance:
|
|
||||||
if ((z1R == ROULEUR_ZDET_FLOATING_IMPEDANCE) ||
|
if ((z1R == ROULEUR_ZDET_FLOATING_IMPEDANCE) ||
|
||||||
(z1R > ROULEUR_ZDET_VAL_100K)) {
|
(z1R > ROULEUR_ZDET_VAL_100K))
|
||||||
*zr = ROULEUR_ZDET_FLOATING_IMPEDANCE;
|
*zr = ROULEUR_ZDET_FLOATING_IMPEDANCE;
|
||||||
} else {
|
else
|
||||||
*zr = z1R/1000;
|
*zr = z1R/1000;
|
||||||
rouleur_wcd_mbhc_qfuse_cal(component, zr, 1);
|
|
||||||
}
|
|
||||||
dev_dbg(component->dev, "%s: impedance on HPH_R = %d(ohms)\n",
|
dev_dbg(component->dev, "%s: impedance on HPH_R = %d(ohms)\n",
|
||||||
__func__, *zr);
|
__func__, *zr);
|
||||||
|
|
||||||
@@ -647,24 +604,10 @@ right_ch_impedance:
|
|||||||
mbhc->hph_type = WCD_MBHC_HPH_MONO;
|
mbhc->hph_type = WCD_MBHC_HPH_MONO;
|
||||||
goto zdet_complete;
|
goto zdet_complete;
|
||||||
}
|
}
|
||||||
snd_soc_component_update_bits(component, ROULEUR_HPH_R_ATEST,
|
|
||||||
0x02, 0x02);
|
z1Ls = z1L/1000;
|
||||||
snd_soc_component_update_bits(component, ROULEUR_HPH_PA_CTL2,
|
/* Parallel of left Z and 20 ohm pull down resistor */
|
||||||
0x40, 0x01);
|
zMono = ((*zl) * 20) / ((*zl) + 20);
|
||||||
if (*zl < (ROULEUR_ZDET_VAL_32/1000))
|
|
||||||
rouleur_mbhc_zdet_ramp(component, &zdet_param[0], &z1Ls,
|
|
||||||
NULL, d1);
|
|
||||||
else
|
|
||||||
rouleur_mbhc_zdet_ramp(component, &zdet_param[1], &z1Ls,
|
|
||||||
NULL, d1);
|
|
||||||
snd_soc_component_update_bits(component, ROULEUR_HPH_PA_CTL2,
|
|
||||||
0x40, 0x00);
|
|
||||||
snd_soc_component_update_bits(component, ROULEUR_HPH_R_ATEST,
|
|
||||||
0x02, 0x00);
|
|
||||||
z1Ls /= 1000;
|
|
||||||
rouleur_wcd_mbhc_qfuse_cal(component, &z1Ls, 0);
|
|
||||||
/* Parallel of left Z and 9 ohm pull down resistor */
|
|
||||||
zMono = ((*zl) * 9) / ((*zl) + 9);
|
|
||||||
z_diff1 = (z1Ls > zMono) ? (z1Ls - zMono) : (zMono - z1Ls);
|
z_diff1 = (z1Ls > zMono) ? (z1Ls - zMono) : (zMono - z1Ls);
|
||||||
z_diff2 = ((*zl) > z1Ls) ? ((*zl) - z1Ls) : (z1Ls - (*zl));
|
z_diff2 = ((*zl) > z1Ls) ? ((*zl) - z1Ls) : (z1Ls - (*zl));
|
||||||
if ((z_diff1 * (*zl + z1Ls)) > (z_diff2 * (z1Ls + zMono))) {
|
if ((z_diff1 * (*zl + z1Ls)) > (z_diff2 * (z1Ls + zMono))) {
|
||||||
@@ -677,13 +620,10 @@ right_ch_impedance:
|
|||||||
mbhc->hph_type = WCD_MBHC_HPH_MONO;
|
mbhc->hph_type = WCD_MBHC_HPH_MONO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
zdet_complete:
|
||||||
/* Enable surge protection again after impedance detection */
|
/* Enable surge protection again after impedance detection */
|
||||||
regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
|
||||||
ROULEUR_HPH_SURGE_HPHLR_SURGE_EN, 0xC0, 0xC0);
|
ROULEUR_ANA_SURGE_EN, 0xC0, 0xC0);
|
||||||
zdet_complete:
|
|
||||||
snd_soc_component_write(component, ROULEUR_ANA_MBHC_BTN5, reg0);
|
|
||||||
snd_soc_component_write(component, ROULEUR_ANA_MBHC_BTN6, reg1);
|
|
||||||
snd_soc_component_write(component, ROULEUR_ANA_MBHC_BTN7, reg2);
|
|
||||||
/* Turn on 100k pull down on HPHL */
|
/* Turn on 100k pull down on HPHL */
|
||||||
regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
|
||||||
ROULEUR_ANA_MBHC_MECH, 0x01, 0x01);
|
ROULEUR_ANA_MBHC_MECH, 0x01, 0x01);
|
||||||
@@ -693,13 +633,14 @@ zdet_complete:
|
|||||||
regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
|
||||||
ROULEUR_ANA_MBHC_MECH, 0x80, 0x80);
|
ROULEUR_ANA_MBHC_MECH, 0x80, 0x80);
|
||||||
|
|
||||||
snd_soc_component_write(component, ROULEUR_ANA_MBHC_ZDET_ANA_CTL, reg4);
|
/* Restore electrical bias state */
|
||||||
snd_soc_component_write(component, ROULEUR_MBHC_CTL_CLK, reg3);
|
snd_soc_component_update_bits(component, ROULEUR_ANA_MBHC_ELECT, 0x01,
|
||||||
|
reg0 >> 7);
|
||||||
if (is_fsm_disable)
|
if (is_fsm_disable)
|
||||||
regmap_update_bits(rouleur->regmap,
|
regmap_update_bits(rouleur->regmap,
|
||||||
ROULEUR_ANA_MBHC_ELECT, 0x80, 0x80);
|
ROULEUR_ANA_MBHC_ELECT, 0x80, 0x80);
|
||||||
|
rouleur_global_mbias_disable(component);
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|
||||||
static void rouleur_mbhc_gnd_det_ctrl(struct snd_soc_component *component,
|
static void rouleur_mbhc_gnd_det_ctrl(struct snd_soc_component *component,
|
||||||
bool enable)
|
bool enable)
|
||||||
@@ -723,10 +664,10 @@ static void rouleur_mbhc_hph_pull_down_ctrl(struct snd_soc_component *component,
|
|||||||
if (enable) {
|
if (enable) {
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_HPHPA_CNP_CTL_2,
|
ROULEUR_ANA_HPHPA_CNP_CTL_2,
|
||||||
0x30, 0x10);
|
0x30, 0x20);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_HPHPA_CNP_CTL_2,
|
ROULEUR_ANA_HPHPA_CNP_CTL_2,
|
||||||
0x0C, 0x04);
|
0x0C, 0x08);
|
||||||
} else {
|
} else {
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_HPHPA_CNP_CTL_2,
|
ROULEUR_ANA_HPHPA_CNP_CTL_2,
|
||||||
@@ -820,6 +761,54 @@ static void rouleur_mbhc_bcs_enable(struct wcd_mbhc *mbhc,
|
|||||||
rouleur_disable_bcs_before_slow_insert(mbhc->component, true);
|
rouleur_disable_bcs_before_slow_insert(mbhc->component, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void rouleur_mbhc_get_micbias_val(struct wcd_mbhc *mbhc, int *mb)
|
||||||
|
{
|
||||||
|
u8 vout_ctl = 0;
|
||||||
|
|
||||||
|
/* Read MBHC Micbias (Mic Bias2) voltage */
|
||||||
|
WCD_MBHC_REG_READ(WCD_MBHC_MICB2_VOUT, vout_ctl);
|
||||||
|
|
||||||
|
/* Formula for getting micbias from vout
|
||||||
|
* micbias = 1.6V + VOUT_CTL * 50mV
|
||||||
|
*/
|
||||||
|
*mb = 1600 + (vout_ctl * 50);
|
||||||
|
pr_debug("%s: vout_ctl: %d, micbias: %d\n", __func__, vout_ctl, *mb);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void rouleur_mbhc_comp_autozero_control(struct wcd_mbhc *mbhc,
|
||||||
|
bool az_enable)
|
||||||
|
{
|
||||||
|
if (az_enable)
|
||||||
|
snd_soc_component_update_bits(mbhc->component,
|
||||||
|
ROULEUR_ANA_MBHC_CTL_CLK, 0x08, 0x08);
|
||||||
|
else
|
||||||
|
snd_soc_component_update_bits(mbhc->component,
|
||||||
|
ROULEUR_ANA_MBHC_CTL_CLK, 0x08, 0x00);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static void rouleur_mbhc_surge_control(struct wcd_mbhc *mbhc,
|
||||||
|
bool surge_enable)
|
||||||
|
{
|
||||||
|
if (surge_enable)
|
||||||
|
snd_soc_component_update_bits(mbhc->component,
|
||||||
|
ROULEUR_ANA_SURGE_EN, 0xC0, 0xC0);
|
||||||
|
else
|
||||||
|
snd_soc_component_update_bits(mbhc->component,
|
||||||
|
ROULEUR_ANA_SURGE_EN, 0xC0, 0x00);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static void rouleur_mbhc_update_cross_conn_thr(struct wcd_mbhc *mbhc)
|
||||||
|
{
|
||||||
|
mbhc->hphl_cross_conn_thr = ROULEUR_HPHL_CROSS_CONN_THRESHOLD;
|
||||||
|
mbhc->hphr_cross_conn_thr = ROULEUR_HPHR_CROSS_CONN_THRESHOLD;
|
||||||
|
|
||||||
|
pr_debug("%s: Cross connection threshold for hphl: %d, hphr: %d\n",
|
||||||
|
__func__, mbhc->hphl_cross_conn_thr,
|
||||||
|
mbhc->hphr_cross_conn_thr);
|
||||||
|
}
|
||||||
|
|
||||||
static const struct wcd_mbhc_cb mbhc_cb = {
|
static const struct wcd_mbhc_cb mbhc_cb = {
|
||||||
.request_irq = rouleur_mbhc_request_irq,
|
.request_irq = rouleur_mbhc_request_irq,
|
||||||
.irq_control = rouleur_mbhc_irq_control,
|
.irq_control = rouleur_mbhc_irq_control,
|
||||||
@@ -837,13 +826,17 @@ static const struct wcd_mbhc_cb mbhc_cb = {
|
|||||||
.mbhc_micb_ramp_control = rouleur_mbhc_micb_ramp_control,
|
.mbhc_micb_ramp_control = rouleur_mbhc_micb_ramp_control,
|
||||||
.get_hwdep_fw_cal = rouleur_get_hwdep_fw_cal,
|
.get_hwdep_fw_cal = rouleur_get_hwdep_fw_cal,
|
||||||
.mbhc_micb_ctrl_thr_mic = rouleur_mbhc_micb_ctrl_threshold_mic,
|
.mbhc_micb_ctrl_thr_mic = rouleur_mbhc_micb_ctrl_threshold_mic,
|
||||||
//.compute_impedance = rouleur_wcd_mbhc_calc_impedance,
|
.compute_impedance = rouleur_wcd_mbhc_calc_impedance,
|
||||||
.mbhc_gnd_det_ctrl = rouleur_mbhc_gnd_det_ctrl,
|
.mbhc_gnd_det_ctrl = rouleur_mbhc_gnd_det_ctrl,
|
||||||
.hph_pull_down_ctrl = rouleur_mbhc_hph_pull_down_ctrl,
|
.hph_pull_down_ctrl = rouleur_mbhc_hph_pull_down_ctrl,
|
||||||
.mbhc_moisture_config = rouleur_mbhc_moisture_config,
|
.mbhc_moisture_config = rouleur_mbhc_moisture_config,
|
||||||
.mbhc_get_moisture_status = rouleur_mbhc_get_moisture_status,
|
.mbhc_get_moisture_status = rouleur_mbhc_get_moisture_status,
|
||||||
.mbhc_moisture_detect_en = rouleur_mbhc_moisture_detect_en,
|
.mbhc_moisture_detect_en = rouleur_mbhc_moisture_detect_en,
|
||||||
.bcs_enable = rouleur_mbhc_bcs_enable,
|
.bcs_enable = rouleur_mbhc_bcs_enable,
|
||||||
|
.get_micbias_val = rouleur_mbhc_get_micbias_val,
|
||||||
|
.mbhc_comp_autozero_control = rouleur_mbhc_comp_autozero_control,
|
||||||
|
.mbhc_surge_ctl = rouleur_mbhc_surge_control,
|
||||||
|
.update_cross_conn_thr = rouleur_mbhc_update_cross_conn_thr,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int rouleur_get_hph_type(struct snd_kcontrol *kcontrol,
|
static int rouleur_get_hph_type(struct snd_kcontrol *kcontrol,
|
||||||
|
@@ -45,7 +45,7 @@ enum {
|
|||||||
#define ROULEUR_ANA_MBHC_ZDET_RAMP_CTL (ROULEUR_ANA_BASE_ADDR+0x06A)
|
#define ROULEUR_ANA_MBHC_ZDET_RAMP_CTL (ROULEUR_ANA_BASE_ADDR+0x06A)
|
||||||
#define ROULEUR_ANA_MBHC_FSM_STATUS (ROULEUR_ANA_BASE_ADDR+0x06B)
|
#define ROULEUR_ANA_MBHC_FSM_STATUS (ROULEUR_ANA_BASE_ADDR+0x06B)
|
||||||
#define ROULEUR_ANA_MBHC_ADC_RESULT (ROULEUR_ANA_BASE_ADDR+0x06C)
|
#define ROULEUR_ANA_MBHC_ADC_RESULT (ROULEUR_ANA_BASE_ADDR+0x06C)
|
||||||
#define ROULEUR_ANA_MBHC_MCLK (ROULEUR_ANA_BASE_ADDR+0x06D)
|
#define ROULEUR_ANA_MBHC_CTL_CLK (ROULEUR_ANA_BASE_ADDR+0x06D)
|
||||||
#define ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT (ROULEUR_ANA_BASE_ADDR+0x072)
|
#define ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT (ROULEUR_ANA_BASE_ADDR+0x072)
|
||||||
#define ROULEUR_ANA_NCP_EN (ROULEUR_ANA_BASE_ADDR+0x077)
|
#define ROULEUR_ANA_NCP_EN (ROULEUR_ANA_BASE_ADDR+0x077)
|
||||||
#define ROULEUR_ANA_HPHPA_CNP_CTL_1 (ROULEUR_ANA_BASE_ADDR+0x083)
|
#define ROULEUR_ANA_HPHPA_CNP_CTL_1 (ROULEUR_ANA_BASE_ADDR+0x083)
|
||||||
|
@@ -38,7 +38,7 @@ static const struct reg_default rouleur_defaults[] = {
|
|||||||
{ ROULEUR_ANA_MBHC_ZDET_RAMP_CTL, 0x00 },
|
{ ROULEUR_ANA_MBHC_ZDET_RAMP_CTL, 0x00 },
|
||||||
{ ROULEUR_ANA_MBHC_FSM_STATUS, 0x00 },
|
{ ROULEUR_ANA_MBHC_FSM_STATUS, 0x00 },
|
||||||
{ ROULEUR_ANA_MBHC_ADC_RESULT, 0x00 },
|
{ ROULEUR_ANA_MBHC_ADC_RESULT, 0x00 },
|
||||||
{ ROULEUR_ANA_MBHC_MCLK, 0x30 },
|
{ ROULEUR_ANA_MBHC_CTL_CLK, 0x30 },
|
||||||
{ ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT, 0x00 },
|
{ ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT, 0x00 },
|
||||||
{ ROULEUR_ANA_NCP_EN, 0x00 },
|
{ ROULEUR_ANA_NCP_EN, 0x00 },
|
||||||
{ ROULEUR_ANA_HPHPA_CNP_CTL_1, 0x54 },
|
{ ROULEUR_ANA_HPHPA_CNP_CTL_1, 0x54 },
|
||||||
|
@@ -33,7 +33,7 @@ const u8 rouleur_reg_access_analog[ROULEUR_REG(
|
|||||||
[ROULEUR_REG(ROULEUR_ANA_MBHC_ZDET_RAMP_CTL)] = RD_WR_REG,
|
[ROULEUR_REG(ROULEUR_ANA_MBHC_ZDET_RAMP_CTL)] = RD_WR_REG,
|
||||||
[ROULEUR_REG(ROULEUR_ANA_MBHC_FSM_STATUS)] = RD_REG,
|
[ROULEUR_REG(ROULEUR_ANA_MBHC_FSM_STATUS)] = RD_REG,
|
||||||
[ROULEUR_REG(ROULEUR_ANA_MBHC_ADC_RESULT)] = RD_REG,
|
[ROULEUR_REG(ROULEUR_ANA_MBHC_ADC_RESULT)] = RD_REG,
|
||||||
[ROULEUR_REG(ROULEUR_ANA_MBHC_MCLK)] = RD_WR_REG,
|
[ROULEUR_REG(ROULEUR_ANA_MBHC_CTL_CLK)] = RD_WR_REG,
|
||||||
[ROULEUR_REG(ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT)] = RD_REG,
|
[ROULEUR_REG(ROULEUR_ANA_MBHC_ZDET_CALIB_RESULT)] = RD_REG,
|
||||||
[ROULEUR_REG(ROULEUR_ANA_NCP_EN)] = RD_WR_REG,
|
[ROULEUR_REG(ROULEUR_ANA_NCP_EN)] = RD_WR_REG,
|
||||||
[ROULEUR_REG(ROULEUR_ANA_HPHPA_CNP_CTL_1)] = RD_WR_REG,
|
[ROULEUR_REG(ROULEUR_ANA_HPHPA_CNP_CTL_1)] = RD_WR_REG,
|
||||||
|
@@ -108,6 +108,9 @@ static int rouleur_handle_post_irq(void *data)
|
|||||||
|
|
||||||
static int rouleur_init_reg(struct snd_soc_component *component)
|
static int rouleur_init_reg(struct snd_soc_component *component)
|
||||||
{
|
{
|
||||||
|
/* Disable HPH OCP */
|
||||||
|
snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
|
||||||
|
0x03, 0x00);
|
||||||
/* Enable surge protection */
|
/* Enable surge protection */
|
||||||
snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
|
snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
|
||||||
0xC0, 0xC0);
|
0xC0, 0xC0);
|
||||||
@@ -302,7 +305,7 @@ static int rouleur_rx_connect_port(struct snd_soc_component *component,
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int rouleur_global_mbias_enable(struct snd_soc_component *component)
|
int rouleur_global_mbias_enable(struct snd_soc_component *component)
|
||||||
{
|
{
|
||||||
struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
|
struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
|
||||||
|
|
||||||
@@ -320,7 +323,7 @@ static int rouleur_global_mbias_enable(struct snd_soc_component *component)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int rouleur_global_mbias_disable(struct snd_soc_component *component)
|
int rouleur_global_mbias_disable(struct snd_soc_component *component)
|
||||||
{
|
{
|
||||||
struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
|
struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
|
||||||
|
|
||||||
@@ -355,7 +358,7 @@ static int rouleur_rx_clk_enable(struct snd_soc_component *component)
|
|||||||
usleep_range(5000, 5100);
|
usleep_range(5000, 5100);
|
||||||
rouleur_global_mbias_enable(component);
|
rouleur_global_mbias_enable(component);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x11);
|
ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
|
ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
@@ -383,14 +386,14 @@ static int rouleur_rx_clk_disable(struct snd_soc_component *component)
|
|||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
|
ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x00);
|
ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_ANA_NCP_EN, 0x01, 0x00);
|
ROULEUR_ANA_NCP_EN, 0x01, 0x00);
|
||||||
rouleur_global_mbias_disable(component);
|
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
|
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
|
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
|
||||||
|
rouleur_global_mbias_disable(component);
|
||||||
|
|
||||||
}
|
}
|
||||||
mutex_unlock(&rouleur->rx_clk_lock);
|
mutex_unlock(&rouleur->rx_clk_lock);
|
||||||
@@ -470,7 +473,7 @@ static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
|
|||||||
}
|
}
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX0_CTL,
|
ROULEUR_DIG_SWR_CDC_RX0_CTL,
|
||||||
0x7C, 0x7C);
|
0x80, 0x00);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
||||||
0x04, 0x04);
|
0x04, 0x04);
|
||||||
@@ -479,8 +482,18 @@ static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
|
|||||||
break;
|
break;
|
||||||
case SND_SOC_DAPM_POST_PMD:
|
case SND_SOC_DAPM_POST_PMD:
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
|
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
|
||||||
0x01, 0x00);
|
0x01, 0x00);
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
||||||
|
0x04, 0x00);
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_RX0_CTL,
|
||||||
|
0x80, 0x80);
|
||||||
|
if (rouleur->comp1_enable)
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
|
||||||
|
0x02, 0x00);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -535,7 +548,7 @@ static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
|
|||||||
}
|
}
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX1_CTL,
|
ROULEUR_DIG_SWR_CDC_RX1_CTL,
|
||||||
0x7C, 0x7C);
|
0x80, 0x00);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
||||||
0x08, 0x08);
|
0x08, 0x08);
|
||||||
@@ -545,6 +558,16 @@ static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
|
|||||||
case SND_SOC_DAPM_POST_PMD:
|
case SND_SOC_DAPM_POST_PMD:
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
|
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
||||||
|
0x08, 0x00);
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_RX1_CTL,
|
||||||
|
0x80, 0x80);
|
||||||
|
if (rouleur->comp2_enable)
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
|
||||||
|
0x01, 0x00);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
@@ -567,19 +590,25 @@ static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
|
|||||||
rouleur_rx_clk_enable(component);
|
rouleur_rx_clk_enable(component);
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX0_CTL,
|
ROULEUR_DIG_SWR_CDC_RX0_CTL,
|
||||||
0x7C, 0x7C);
|
0x80, 0x00);
|
||||||
snd_soc_component_update_bits(component,
|
|
||||||
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
|
|
||||||
0x01, 0x01);
|
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
||||||
0x04, 0x04);
|
0x04, 0x04);
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
|
||||||
|
0x01, 0x01);
|
||||||
|
|
||||||
break;
|
break;
|
||||||
case SND_SOC_DAPM_POST_PMD:
|
case SND_SOC_DAPM_POST_PMD:
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
|
ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
|
||||||
0x01, 0x00);
|
0x01, 0x00);
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
|
||||||
|
0x04, 0x00);
|
||||||
|
snd_soc_component_update_bits(component,
|
||||||
|
ROULEUR_DIG_SWR_CDC_RX0_CTL,
|
||||||
|
0x80, 0x80);
|
||||||
|
|
||||||
break;
|
break;
|
||||||
};
|
};
|
||||||
@@ -1147,6 +1176,7 @@ int rouleur_micbias_control(struct snd_soc_component *component,
|
|||||||
int post_on_event = 0, post_dapm_off = 0;
|
int post_on_event = 0, post_dapm_off = 0;
|
||||||
int post_dapm_on = 0;
|
int post_dapm_on = 0;
|
||||||
u8 pullup_mask = 0, enable_mask = 0;
|
u8 pullup_mask = 0, enable_mask = 0;
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
|
if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
|
||||||
dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
|
dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
|
||||||
@@ -1182,6 +1212,12 @@ int rouleur_micbias_control(struct snd_soc_component *component,
|
|||||||
|
|
||||||
switch (req) {
|
switch (req) {
|
||||||
case MICB_PULLUP_ENABLE:
|
case MICB_PULLUP_ENABLE:
|
||||||
|
if (!rouleur->dev_up) {
|
||||||
|
dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
|
||||||
|
__func__, req);
|
||||||
|
ret = -ENODEV;
|
||||||
|
goto done;
|
||||||
|
}
|
||||||
rouleur->pullup_ref[micb_index]++;
|
rouleur->pullup_ref[micb_index]++;
|
||||||
if ((rouleur->pullup_ref[micb_index] == 1) &&
|
if ((rouleur->pullup_ref[micb_index] == 1) &&
|
||||||
(rouleur->micb_ref[micb_index] == 0))
|
(rouleur->micb_ref[micb_index] == 0))
|
||||||
@@ -1189,6 +1225,12 @@ int rouleur_micbias_control(struct snd_soc_component *component,
|
|||||||
pullup_mask, pullup_mask);
|
pullup_mask, pullup_mask);
|
||||||
break;
|
break;
|
||||||
case MICB_PULLUP_DISABLE:
|
case MICB_PULLUP_DISABLE:
|
||||||
|
if (!rouleur->dev_up) {
|
||||||
|
dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
|
||||||
|
__func__, req);
|
||||||
|
ret = -ENODEV;
|
||||||
|
goto done;
|
||||||
|
}
|
||||||
if (rouleur->pullup_ref[micb_index] > 0)
|
if (rouleur->pullup_ref[micb_index] > 0)
|
||||||
rouleur->pullup_ref[micb_index]--;
|
rouleur->pullup_ref[micb_index]--;
|
||||||
if ((rouleur->pullup_ref[micb_index] == 0) &&
|
if ((rouleur->pullup_ref[micb_index] == 0) &&
|
||||||
@@ -1197,11 +1239,15 @@ int rouleur_micbias_control(struct snd_soc_component *component,
|
|||||||
pullup_mask, 0x00);
|
pullup_mask, 0x00);
|
||||||
break;
|
break;
|
||||||
case MICB_ENABLE:
|
case MICB_ENABLE:
|
||||||
|
if (!rouleur->dev_up) {
|
||||||
|
dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
|
||||||
|
__func__, req);
|
||||||
|
ret = -ENODEV;
|
||||||
|
goto done;
|
||||||
|
}
|
||||||
rouleur->micb_ref[micb_index]++;
|
rouleur->micb_ref[micb_index]++;
|
||||||
if (rouleur->micb_ref[micb_index] == 1) {
|
if (rouleur->micb_ref[micb_index] == 1) {
|
||||||
rouleur_global_mbias_enable(component);
|
rouleur_global_mbias_enable(component);
|
||||||
snd_soc_component_update_bits(component, micb_reg,
|
|
||||||
0x80, 0x80);
|
|
||||||
snd_soc_component_update_bits(component,
|
snd_soc_component_update_bits(component,
|
||||||
micb_reg, enable_mask, enable_mask);
|
micb_reg, enable_mask, enable_mask);
|
||||||
if (post_on_event)
|
if (post_on_event)
|
||||||
@@ -1217,16 +1263,27 @@ int rouleur_micbias_control(struct snd_soc_component *component,
|
|||||||
case MICB_DISABLE:
|
case MICB_DISABLE:
|
||||||
if (rouleur->micb_ref[micb_index] > 0)
|
if (rouleur->micb_ref[micb_index] > 0)
|
||||||
rouleur->micb_ref[micb_index]--;
|
rouleur->micb_ref[micb_index]--;
|
||||||
|
if (!rouleur->dev_up) {
|
||||||
|
dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
|
||||||
|
__func__, req);
|
||||||
|
ret = -ENODEV;
|
||||||
|
goto done;
|
||||||
|
}
|
||||||
if ((rouleur->micb_ref[micb_index] == 0) &&
|
if ((rouleur->micb_ref[micb_index] == 0) &&
|
||||||
(rouleur->pullup_ref[micb_index] == 0)) {
|
(rouleur->pullup_ref[micb_index] > 0)) {
|
||||||
|
snd_soc_component_update_bits(component, micb_reg,
|
||||||
|
pullup_mask, pullup_mask);
|
||||||
|
snd_soc_component_update_bits(component, micb_reg,
|
||||||
|
enable_mask, 0x00);
|
||||||
|
rouleur_global_mbias_disable(component);
|
||||||
|
} else if ((rouleur->micb_ref[micb_index] == 0) &&
|
||||||
|
(rouleur->pullup_ref[micb_index] == 0)) {
|
||||||
if (pre_off_event && rouleur->mbhc)
|
if (pre_off_event && rouleur->mbhc)
|
||||||
blocking_notifier_call_chain(
|
blocking_notifier_call_chain(
|
||||||
&rouleur->mbhc->notifier, pre_off_event,
|
&rouleur->mbhc->notifier, pre_off_event,
|
||||||
&rouleur->mbhc->wcd_mbhc);
|
&rouleur->mbhc->wcd_mbhc);
|
||||||
snd_soc_component_update_bits(component, micb_reg,
|
snd_soc_component_update_bits(component, micb_reg,
|
||||||
enable_mask, 0x00);
|
enable_mask, 0x00);
|
||||||
snd_soc_component_update_bits(component, micb_reg,
|
|
||||||
0x80, 0x00);
|
|
||||||
rouleur_global_mbias_disable(component);
|
rouleur_global_mbias_disable(component);
|
||||||
if (post_off_event && rouleur->mbhc)
|
if (post_off_event && rouleur->mbhc)
|
||||||
blocking_notifier_call_chain(
|
blocking_notifier_call_chain(
|
||||||
@@ -1244,8 +1301,8 @@ int rouleur_micbias_control(struct snd_soc_component *component,
|
|||||||
dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
|
dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
|
||||||
__func__, micb_num, rouleur->micb_ref[micb_index],
|
__func__, micb_num, rouleur->micb_ref[micb_index],
|
||||||
rouleur->pullup_ref[micb_index]);
|
rouleur->pullup_ref[micb_index]);
|
||||||
|
done:
|
||||||
mutex_unlock(&rouleur->micb_lock);
|
mutex_unlock(&rouleur->micb_lock);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(rouleur_micbias_control);
|
EXPORT_SYMBOL(rouleur_micbias_control);
|
||||||
@@ -1285,6 +1342,17 @@ static int rouleur_get_logical_addr(struct swr_device *swr_dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool get_usbc_hs_status(struct snd_soc_component *component,
|
||||||
|
struct wcd_mbhc_config *mbhc_cfg)
|
||||||
|
{
|
||||||
|
if (mbhc_cfg->enable_usbc_analog) {
|
||||||
|
if (!(snd_soc_component_read32(component, ROULEUR_ANA_MBHC_MECH)
|
||||||
|
& 0x20))
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
static int rouleur_event_notify(struct notifier_block *block,
|
static int rouleur_event_notify(struct notifier_block *block,
|
||||||
unsigned long val,
|
unsigned long val,
|
||||||
void *data)
|
void *data)
|
||||||
@@ -1314,8 +1382,11 @@ static int rouleur_event_notify(struct notifier_block *block,
|
|||||||
0x80, 0x00);
|
0x80, 0x00);
|
||||||
break;
|
break;
|
||||||
case BOLERO_WCD_EVT_SSR_DOWN:
|
case BOLERO_WCD_EVT_SSR_DOWN:
|
||||||
|
rouleur->dev_up = false;
|
||||||
rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
|
rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
|
||||||
mbhc = &rouleur->mbhc->wcd_mbhc;
|
mbhc = &rouleur->mbhc->wcd_mbhc;
|
||||||
|
rouleur->usbc_hs_status = get_usbc_hs_status(component,
|
||||||
|
mbhc->mbhc_cfg);
|
||||||
rouleur_mbhc_ssr_down(rouleur->mbhc, component);
|
rouleur_mbhc_ssr_down(rouleur->mbhc, component);
|
||||||
rouleur_reset(rouleur->dev, 0x01);
|
rouleur_reset(rouleur->dev, 0x01);
|
||||||
break;
|
break;
|
||||||
@@ -1337,8 +1408,11 @@ static int rouleur_event_notify(struct notifier_block *block,
|
|||||||
__func__);
|
__func__);
|
||||||
} else {
|
} else {
|
||||||
rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
|
rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
|
||||||
|
if (rouleur->usbc_hs_status)
|
||||||
|
mdelay(500);
|
||||||
}
|
}
|
||||||
rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
|
rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
|
||||||
|
rouleur->dev_up = true;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
dev_err(component->dev, "%s: invalid event %d\n", __func__,
|
dev_err(component->dev, "%s: invalid event %d\n", __func__,
|
||||||
@@ -1970,6 +2044,7 @@ static int rouleur_soc_codec_probe(struct snd_soc_component *component)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
rouleur->dev_up = true;
|
||||||
done:
|
done:
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@@ -33,16 +33,20 @@ static int wcd_mbhc_get_micbias(struct wcd_mbhc *mbhc)
|
|||||||
int micbias = 0;
|
int micbias = 0;
|
||||||
u8 vout_ctl = 0;
|
u8 vout_ctl = 0;
|
||||||
|
|
||||||
/* Read MBHC Micbias (Mic Bias2) voltage */
|
if (mbhc->mbhc_cb->get_micbias_val) {
|
||||||
WCD_MBHC_REG_READ(WCD_MBHC_MICB2_VOUT, vout_ctl);
|
mbhc->mbhc_cb->get_micbias_val(mbhc, &micbias);
|
||||||
|
pr_debug("%s: micbias: %d\n", __func__, micbias);
|
||||||
/* Formula for getting micbias from vout
|
} else {
|
||||||
* micbias = 1.0V + VOUT_CTL * 50mV
|
/* Read MBHC Micbias (Mic Bias2) voltage */
|
||||||
*/
|
WCD_MBHC_REG_READ(WCD_MBHC_MICB2_VOUT, vout_ctl);
|
||||||
micbias = 1000 + (vout_ctl * 50);
|
|
||||||
pr_debug("%s: vout_ctl: %d, micbias: %d\n",
|
|
||||||
__func__, vout_ctl, micbias);
|
|
||||||
|
|
||||||
|
/* Formula for getting micbias from vout
|
||||||
|
* micbias = 1.0V + VOUT_CTL * 50mV
|
||||||
|
*/
|
||||||
|
micbias = 1000 + (vout_ctl * 50);
|
||||||
|
pr_debug("%s: vout_ctl: %d, micbias: %d\n",
|
||||||
|
__func__, vout_ctl, micbias);
|
||||||
|
}
|
||||||
return micbias;
|
return micbias;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -76,8 +80,22 @@ static int wcd_measure_adc_continuous(struct wcd_mbhc *mbhc)
|
|||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_FSM_EN, 0);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_FSM_EN, 0);
|
||||||
/* Set the MUX selection to IN2P */
|
/* Set the MUX selection to IN2P */
|
||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_MUX_CTL, MUX_CTL_IN2P);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_MUX_CTL, MUX_CTL_IN2P);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Current source mode requires Auto zeroing to be enabled
|
||||||
|
* automatically. If HW doesn't do it, SW has to take care of this
|
||||||
|
* for button interrupts to work fine and to avoid
|
||||||
|
* fake electrical removal interrupts by enabling autozero before FSM
|
||||||
|
* enable and disable it after FSM enable
|
||||||
|
*/
|
||||||
|
if (mbhc->mbhc_cb->mbhc_comp_autozero_control)
|
||||||
|
mbhc->mbhc_cb->mbhc_comp_autozero_control(mbhc,
|
||||||
|
true);
|
||||||
/* Enable MBHC FSM */
|
/* Enable MBHC FSM */
|
||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_FSM_EN, 1);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_FSM_EN, 1);
|
||||||
|
if (mbhc->mbhc_cb->mbhc_comp_autozero_control)
|
||||||
|
mbhc->mbhc_cb->mbhc_comp_autozero_control(mbhc,
|
||||||
|
false);
|
||||||
/* Enable ADC_ENABLE bit */
|
/* Enable ADC_ENABLE bit */
|
||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_ADC_EN, 1);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_ADC_EN, 1);
|
||||||
|
|
||||||
@@ -290,6 +308,10 @@ static int wcd_check_cross_conn(struct wcd_mbhc *mbhc)
|
|||||||
WCD_MBHC_REG_READ(WCD_MBHC_ELECT_SCHMT_ISRC, elect_ctl);
|
WCD_MBHC_REG_READ(WCD_MBHC_ELECT_SCHMT_ISRC, elect_ctl);
|
||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_ELECT_SCHMT_ISRC, 0x00);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_ELECT_SCHMT_ISRC, 0x00);
|
||||||
|
|
||||||
|
/* Disable surge detection before ADC measurement */
|
||||||
|
if (mbhc->mbhc_cb->mbhc_surge_ctl)
|
||||||
|
mbhc->mbhc_cb->mbhc_surge_ctl(mbhc, false);
|
||||||
|
|
||||||
/* Read and set ADC to single measurement */
|
/* Read and set ADC to single measurement */
|
||||||
WCD_MBHC_REG_READ(WCD_MBHC_ADC_MODE, adc_mode);
|
WCD_MBHC_REG_READ(WCD_MBHC_ADC_MODE, adc_mode);
|
||||||
/* Read ADC Enable bit to restore after adc measurement */
|
/* Read ADC Enable bit to restore after adc measurement */
|
||||||
@@ -313,7 +335,12 @@ static int wcd_check_cross_conn(struct wcd_mbhc *mbhc)
|
|||||||
goto done;
|
goto done;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (hphl_adc_res > 100 || hphr_adc_res > 100) {
|
/* Update cross connection threshold voltages if needed */
|
||||||
|
if (mbhc->mbhc_cb->update_cross_conn_thr)
|
||||||
|
mbhc->mbhc_cb->update_cross_conn_thr(mbhc);
|
||||||
|
|
||||||
|
if (hphl_adc_res > mbhc->hphl_cross_conn_thr ||
|
||||||
|
hphr_adc_res > mbhc->hphr_cross_conn_thr) {
|
||||||
plug_type = MBHC_PLUG_TYPE_GND_MIC_SWAP;
|
plug_type = MBHC_PLUG_TYPE_GND_MIC_SWAP;
|
||||||
pr_debug("%s: Cross connection identified\n", __func__);
|
pr_debug("%s: Cross connection identified\n", __func__);
|
||||||
} else {
|
} else {
|
||||||
@@ -335,6 +362,10 @@ done:
|
|||||||
/* Restore FSM state */
|
/* Restore FSM state */
|
||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_FSM_EN, fsm_en);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_FSM_EN, fsm_en);
|
||||||
|
|
||||||
|
/* Restore surge detection */
|
||||||
|
if (mbhc->mbhc_cb->mbhc_surge_ctl)
|
||||||
|
mbhc->mbhc_cb->mbhc_surge_ctl(mbhc, true);
|
||||||
|
|
||||||
/* Restore electrical detection */
|
/* Restore electrical detection */
|
||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_ELECT_SCHMT_ISRC, elect_ctl);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_ELECT_SCHMT_ISRC, elect_ctl);
|
||||||
|
|
||||||
|
@@ -80,10 +80,12 @@ static void wcd_program_hs_vref(struct wcd_mbhc *mbhc)
|
|||||||
struct snd_soc_component *component = mbhc->component;
|
struct snd_soc_component *component = mbhc->component;
|
||||||
u32 reg_val;
|
u32 reg_val;
|
||||||
|
|
||||||
plug_type_cfg = WCD_MBHC_CAL_PLUG_TYPE_PTR(mbhc->mbhc_cfg->calibration);
|
plug_type_cfg = WCD_MBHC_CAL_PLUG_TYPE_PTR(
|
||||||
|
mbhc->mbhc_cfg->calibration);
|
||||||
reg_val = ((plug_type_cfg->v_hs_max - HS_VREF_MIN_VAL) / 100);
|
reg_val = ((plug_type_cfg->v_hs_max - HS_VREF_MIN_VAL) / 100);
|
||||||
|
|
||||||
dev_dbg(component->dev, "%s: reg_val = %x\n", __func__, reg_val);
|
dev_dbg(component->dev, "%s: reg_val = %x\n",
|
||||||
|
__func__, reg_val);
|
||||||
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HS_VREF, reg_val);
|
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_HS_VREF, reg_val);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1838,6 +1840,8 @@ int wcd_mbhc_init(struct wcd_mbhc *mbhc, struct snd_soc_component *component,
|
|||||||
mbhc->hph_type = WCD_MBHC_HPH_NONE;
|
mbhc->hph_type = WCD_MBHC_HPH_NONE;
|
||||||
mbhc->wcd_mbhc_regs = wcd_mbhc_regs;
|
mbhc->wcd_mbhc_regs = wcd_mbhc_regs;
|
||||||
mbhc->swap_thr = GND_MIC_SWAP_THRESHOLD;
|
mbhc->swap_thr = GND_MIC_SWAP_THRESHOLD;
|
||||||
|
mbhc->hphl_cross_conn_thr = HPHL_CROSS_CONN_THRESHOLD;
|
||||||
|
mbhc->hphr_cross_conn_thr = HPHR_CROSS_CONN_THRESHOLD;
|
||||||
|
|
||||||
if (mbhc->intr_ids == NULL) {
|
if (mbhc->intr_ids == NULL) {
|
||||||
pr_err("%s: Interrupt mapping not provided\n", __func__);
|
pr_err("%s: Interrupt mapping not provided\n", __func__);
|
||||||
|
@@ -145,6 +145,8 @@ do { \
|
|||||||
#define FW_READ_ATTEMPTS 15
|
#define FW_READ_ATTEMPTS 15
|
||||||
#define FW_READ_TIMEOUT 4000000
|
#define FW_READ_TIMEOUT 4000000
|
||||||
#define FAKE_REM_RETRY_ATTEMPTS 3
|
#define FAKE_REM_RETRY_ATTEMPTS 3
|
||||||
|
#define HPHL_CROSS_CONN_THRESHOLD 100
|
||||||
|
#define HPHR_CROSS_CONN_THRESHOLD 100
|
||||||
|
|
||||||
#define WCD_MBHC_BTN_PRESS_COMPL_TIMEOUT_MS 50
|
#define WCD_MBHC_BTN_PRESS_COMPL_TIMEOUT_MS 50
|
||||||
#define ANC_DETECT_RETRY_CNT 7
|
#define ANC_DETECT_RETRY_CNT 7
|
||||||
@@ -456,6 +458,14 @@ struct wcd_mbhc_register {
|
|||||||
};
|
};
|
||||||
|
|
||||||
struct wcd_mbhc_cb {
|
struct wcd_mbhc_cb {
|
||||||
|
void (*update_cross_conn_thr)
|
||||||
|
(struct wcd_mbhc *mbhc);
|
||||||
|
void (*mbhc_surge_ctl)
|
||||||
|
(struct wcd_mbhc *mbhc, bool surge_en);
|
||||||
|
void (*mbhc_comp_autozero_control)
|
||||||
|
(struct wcd_mbhc *mbhc, bool az_enable);
|
||||||
|
void (*get_micbias_val)
|
||||||
|
(struct wcd_mbhc *mbhc, int *mb);
|
||||||
void (*bcs_enable)
|
void (*bcs_enable)
|
||||||
(struct wcd_mbhc *mbhc, bool bcs_enable);
|
(struct wcd_mbhc *mbhc, bool bcs_enable);
|
||||||
int (*enable_mb_source)(struct wcd_mbhc *mbhc, bool turn_on);
|
int (*enable_mb_source)(struct wcd_mbhc *mbhc, bool turn_on);
|
||||||
@@ -551,6 +561,8 @@ struct wcd_mbhc {
|
|||||||
u32 moist_vref;
|
u32 moist_vref;
|
||||||
u32 moist_iref;
|
u32 moist_iref;
|
||||||
u32 moist_rref;
|
u32 moist_rref;
|
||||||
|
u32 hphl_cross_conn_thr;
|
||||||
|
u32 hphr_cross_conn_thr;
|
||||||
u8 micbias1_cap_mode; /* track ext cap setting */
|
u8 micbias1_cap_mode; /* track ext cap setting */
|
||||||
u8 micbias2_cap_mode; /* track ext cap setting */
|
u8 micbias2_cap_mode; /* track ext cap setting */
|
||||||
bool hs_detect_work_stop;
|
bool hs_detect_work_stop;
|
||||||
|
Reference in New Issue
Block a user