qcacmn: Enable wlan datapath CE IRQ affine

Set affinity to assign WLAN CE datapath IRQs to perf clusters
based on the INI config.

Change-Id: I63f96bc6b434af2e322ef277096e5547cfa6835a
CRs-Fixed: 3590583

hif/inc/hif.h

@@ -462,6 +462,7 @@ struct qca_napi_data {
  * @enable_runtime_pm: Enable Runtime PM
  * @runtime_pm_delay: Runtime PM Delay
  * @rx_softirq_max_yield_duration_ns: Max Yield time duration for RX Softirq
+ * @enable_ce_dp_irq_affine: Enable affinity for CE DP IRQs
  *
  * Structure for holding HIF ini parameters.
  */
@@ -472,6 +473,9 @@ struct hif_config_info {
 	u_int32_t runtime_pm_delay;
 #endif
 	uint64_t rx_softirq_max_yield_duration_ns;
+#ifdef FEATURE_ENABLE_CE_DP_IRQ_AFFINE
+	bool enable_ce_dp_irq_affine;
+#endif
 };
 
 /**
@@ -2469,7 +2473,8 @@ void hif_log_ce_info(struct hif_softc *scn, uint8_t *data,
 }
 #endif
 
-#ifdef HIF_CPU_PERF_AFFINE_MASK
+#if defined(HIF_CPU_PERF_AFFINE_MASK) || \
+	defined(FEATURE_ENABLE_CE_DP_IRQ_AFFINE)
 /**
  * hif_config_irq_set_perf_affinity_hint() - API to set affinity
  * @hif_ctx: hif opaque handle

hif/src/dispatcher/multibus_snoc.c

@@ -78,7 +78,11 @@ QDF_STATUS hif_initialize_snoc_ops(struct hif_bus_ops *bus_ops)
 	bus_ops->hif_map_ce_to_irq = &hif_snoc_map_ce_to_irq;
 	bus_ops->hif_addr_in_boundary = &hif_dummy_addr_in_boundary;
 	bus_ops->hif_needs_bmi = &hif_snoc_needs_bmi;
+#ifdef FEATURE_ENABLE_CE_DP_IRQ_AFFINE
+	bus_ops->hif_config_irq_affinity = &hif_snoc_configure_irq_affinity;
+#else
 	bus_ops->hif_config_irq_affinity = &hif_dummy_config_irq_affinity;
+#endif
 	bus_ops->hif_config_irq_by_ceid = &hif_dummy_config_irq_by_ceid;
 	bus_ops->hif_log_bus_info = &hif_dummy_log_bus_info;
 

hif/src/dispatcher/snoc_api.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -39,4 +40,5 @@ void hif_snoc_display_stats(struct hif_softc *hif_ctx);
 void hif_snoc_clear_stats(struct hif_softc *hif_ctx);
 int hif_snoc_map_ce_to_irq(struct hif_softc *scn, int ce_id);
 bool hif_snoc_needs_bmi(struct hif_softc *scn);
+void hif_snoc_configure_irq_affinity(struct hif_softc *scn);
 #endif /* _SNOC_API_H_ */

hif/src/hif_exec.c

@@ -868,18 +868,6 @@ int32_t hif_get_int_ctx_irq_num(struct hif_opaque_softc *softc,
 
 qdf_export_symbol(hif_get_int_ctx_irq_num);
 
-#ifdef HIF_CPU_PERF_AFFINE_MASK
-void hif_config_irq_set_perf_affinity_hint(
-	struct hif_opaque_softc *hif_ctx)
-{
-	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
-
-	hif_config_irq_affinity(scn);
-}
-
-qdf_export_symbol(hif_config_irq_set_perf_affinity_hint);
-#endif
-
 QDF_STATUS hif_configure_ext_group_interrupts(struct hif_opaque_softc *hif_ctx)
 {
 	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);

hif/src/hif_main.c

@@ -777,7 +777,8 @@ QDF_STATUS hif_unregister_recovery_notifier(struct hif_softc *hif_handle)
 }
 #endif
 
-#ifdef HIF_CPU_PERF_AFFINE_MASK
+#if defined(HIF_CPU_PERF_AFFINE_MASK) || \
+	defined(FEATURE_ENABLE_CE_DP_IRQ_AFFINE)
 /**
  * __hif_cpu_hotplug_notify() - CPU hotplug event handler
  * @context: HIF context
@@ -3350,3 +3351,16 @@ hif_affinity_mgr_init_grp_irq(struct hif_softc *scn, int grp_id,
 	cfg->update_requested = false;
 }
 #endif
+
+#if defined(HIF_CPU_PERF_AFFINE_MASK) || \
+	defined(FEATURE_ENABLE_CE_DP_IRQ_AFFINE)
+void hif_config_irq_set_perf_affinity_hint(
+	struct hif_opaque_softc *hif_ctx)
+{
+	struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
+
+	hif_config_irq_affinity(scn);
+}
+
+qdf_export_symbol(hif_config_irq_set_perf_affinity_hint);
+#endif

hif/src/hif_main.h

@@ -451,7 +451,9 @@ struct hif_softc {
 #ifdef HIF_CE_LOG_INFO
 	qdf_notif_block hif_recovery_notifier;
 #endif
-#ifdef HIF_CPU_PERF_AFFINE_MASK
+#if defined(HIF_CPU_PERF_AFFINE_MASK) || \
+	defined(FEATURE_ENABLE_CE_DP_IRQ_AFFINE)
+
 	/* The CPU hotplug event registration handle */
 	struct qdf_cpuhp_handler *cpuhp_event_handle;
 #endif

hif/src/snoc/if_snoc.c

@@ -481,3 +481,52 @@ bool hif_snoc_needs_bmi(struct hif_softc *scn)
 {
 	return false;
 }
+
+#ifdef FEATURE_ENABLE_CE_DP_IRQ_AFFINE
+static void hif_snoc_ce_dp_irq_set_affinity_hint(struct hif_softc *scn)
+{
+	int ret, irq;
+	unsigned int cpus;
+	struct CE_state *ce_state;
+	int ce_id;
+	qdf_cpu_mask ce_cpu_mask, updated_mask;
+	int perf_cpu_cluster = hif_get_perf_cluster_bitmap();
+	int package_id;
+
+	qdf_cpumask_clear(&ce_cpu_mask);
+
+	qdf_for_each_online_cpu(cpus) {
+		package_id = qdf_topology_physical_package_id(cpus);
+		if (package_id >= 0 && BIT(package_id) & perf_cpu_cluster)
+			qdf_cpumask_set_cpu(cpus, &ce_cpu_mask);
+	}
+
+	if (qdf_cpumask_empty(&ce_cpu_mask)) {
+		hif_err_rl("Empty cpu_mask, unable to set CE DP IRQ affinity");
+		return;
+	}
+
+	for (ce_id = 0; ce_id < scn->ce_count; ce_id++) {
+		ce_state = scn->ce_id_to_state[ce_id];
+		if (!ce_state || !ce_state->htt_rx_data)
+			continue;
+
+		qdf_cpumask_copy(&updated_mask, &ce_cpu_mask);
+		irq = pld_get_irq(scn->qdf_dev->dev, ce_id);
+		ret = hif_affinity_mgr_set_ce_irq_affinity(scn, irq, ce_id,
+							   &updated_mask);
+		if (ret)
+			hif_err_rl("Set affinity %*pbl fails for CE IRQ %d",
+				   qdf_cpumask_pr_args(&updated_mask), irq);
+		else
+			hif_debug_rl("Set affinity %*pbl for CE IRQ: %d",
+				     qdf_cpumask_pr_args(&updated_mask), irq);
+	}
+}
+
+void hif_snoc_configure_irq_affinity(struct hif_softc *scn)
+{
+	if (scn->hif_config.enable_ce_dp_irq_affine)
+		hif_snoc_ce_dp_irq_set_affinity_hint(scn);
+}
+#endif