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qcacmn: Hal changes for Umac post reset at host

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Hal layer changes to handle Umac post reset
and post reset complete events from firmware.

Change-Id: Ib25427930aab25650731c87b38e2ef7e47ae98d9
CRs-Fixed: 3267222
This commit is contained in:
Pavankumar Nandeshwar
2022-08-12 10:40:33 -07:00
committed by Madan Koyyalamudi
parent 67de6bcbfd
commit a615488cf4
11 changed files with 287 additions and 37 deletions
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14
hal/wifi3.0/be/hal_be_generic_api.h
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@@ -2639,17 +2639,21 @@ static void hal_reo_shared_qaddr_setup_be(hal_soc_handle_t hal_soc_hdl)
* write start addr of MLO and Non MLO table in HW
*
* @hal_soc: HAL Soc handle
* @qref_reset: reset qref LUT
*
* Return: None
*/
static void hal_reo_shared_qaddr_init_be(hal_soc_handle_t hal_soc_hdl)
static void hal_reo_shared_qaddr_init_be(hal_soc_handle_t hal_soc_hdl,
int qref_reset)
{
struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
qdf_mem_zero(hal->reo_qref.mlo_reo_qref_table_vaddr,
REO_QUEUE_REF_ML_TABLE_SIZE);
qdf_mem_zero(hal->reo_qref.non_mlo_reo_qref_table_vaddr,
REO_QUEUE_REF_NON_ML_TABLE_SIZE);
if (qref_reset) {
qdf_mem_zero(hal->reo_qref.mlo_reo_qref_table_vaddr,
REO_QUEUE_REF_ML_TABLE_SIZE);
qdf_mem_zero(hal->reo_qref.non_mlo_reo_qref_table_vaddr,
REO_QUEUE_REF_NON_ML_TABLE_SIZE);
}
/* LUT_BASE0 and BASE1 registers expect upper 32bits of LUT base address
* and lower 8 bits to be 0. Shift the physical address by 8 to plug
* upper 32bits only