disp: msm: sde: update encoder wait event timeout condition

The sequence during which issue is observed:

1) wb pending_retire_fence_cnt is equal to 2 due to which
it waits for WB_DONE irq. Current pending_retire_fence_cnt
is 2 and required pending_retire_fence_cnt is 1.

2) Due to external reasons, irq's are disabled and after
some duration, back to back irq's are received.

3) Because of this, pending_retire_fence_cnt becomes zero
before the commit thread could wakeup and validate the
condition.

sde_encoder_helper_wait_for_irq API will wait for complete
timeout due to the count mismatch. This change adds
required check to early exit in such usecases.

Change-Id: I4f9c817cc7acee17424b77928d34b039afcaeae5
Signed-off-by: Yashwanth <[email protected]>

msm/sde/sde_encoder.c

@@ -352,6 +352,7 @@ static int _sde_encoder_wait_timeout(int32_t drm_id, int32_t hw_id,
 	s64 wait_time_jiffies = msecs_to_jiffies(timeout_ms);
 	ktime_t cur_ktime;
 	ktime_t exp_ktime = ktime_add_ms(ktime_get(), timeout_ms);
+	u32 curr_atomic_cnt = atomic_read(info->atomic_cnt);
 
 	do {
 		rc = wait_event_timeout(*(info->wq),
@@ -362,6 +363,14 @@ static int _sde_encoder_wait_timeout(int32_t drm_id, int32_t hw_id,
 		SDE_EVT32(drm_id, hw_id, rc, ktime_to_ms(cur_ktime),
 			timeout_ms, atomic_read(info->atomic_cnt),
 			info->count_check);
+
+		/* Make an early exit if the condition is already satisfied */
+		if ((atomic_read(info->atomic_cnt) < info->count_check) &&
+				(info->count_check < curr_atomic_cnt)) {
+			rc = true;
+			break;
+		}
+
 	/* If we timed out, counter is valid and time is less, wait again */
 	} while ((atomic_read(info->atomic_cnt) != info->count_check) &&
 			(rc == 0) &&