samsung-sm8650/android_kernel_samsung_sm8650-modules
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disp: msm: sde: program INTF VSYNC src_en bits for vsync TS

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From MSSS 10.x, the src_en bits needs to be set appropriately for
vid/cmd mode for getting the vsync timestamp. Program it based
on the new feature flag SDE_INTF_VSYNC_TS_SRC_EN.

Change-Id: Ia9c59d66afb436f082c7ebe6bf28e3953fde27a5
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
This commit is contained in:
Veera Sundaram Sankaran
2023-04-25 11:21:34 -07:00
父節點 90ba54e04b
當前提交 a599814880
共有 3 個文件被更改，包括 21 次插入 和 7 次删除
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25
msm/sde/sde_hw_intf.c
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@@ -433,17 +433,22 @@ static void sde_hw_intf_setup_timing_engine(struct sde_hw_intf *ctx,
SDE_REG_WRITE(c, INTF_ACTIVE_DATA_HCTL, active_data_hctl);
}
static void sde_hw_intf_enable_timing_engine(
struct sde_hw_intf *intf,
u8 enable)
static void sde_hw_intf_enable_timing_engine(struct sde_hw_intf *intf, u8 enable)
{
struct sde_hw_blk_reg_map *c = &intf->hw;
u32 val;
/* Note: Display interface select is handled in top block hw layer */
SDE_REG_WRITE(c, INTF_TIMING_ENGINE_EN, enable != 0);
if (enable && (intf->cap->features & (BIT(SDE_INTF_PANEL_VSYNC_TS) | BIT(SDE_INTF_MDP_VSYNC_TS))))
SDE_REG_WRITE(c, INTF_VSYNC_TIMESTAMP_CTRL, BIT(0));
if (enable && (intf->cap->features
& (BIT(SDE_INTF_PANEL_VSYNC_TS) | BIT(SDE_INTF_MDP_VSYNC_TS)))) {
val = BIT(0);
if (intf->cap->features & SDE_INTF_VSYNC_TS_SRC_EN)
val |= BIT(4);
SDE_REG_WRITE(c, INTF_VSYNC_TIMESTAMP_CTRL, val);
}
}
static void sde_hw_intf_setup_prg_fetch(
@@ -843,8 +848,14 @@ static int sde_hw_intf_enable_te(struct sde_hw_intf *intf, bool enable)
SDE_REG_WRITE(c, INTF_TEAR_TEAR_CHECK_EN, val);
if (enable && (intf->cap->features & (BIT(SDE_INTF_PANEL_VSYNC_TS) | BIT(SDE_INTF_MDP_VSYNC_TS))))
SDE_REG_WRITE(c, INTF_VSYNC_TIMESTAMP_CTRL, BIT(0));
if (enable && (intf->cap->features &
(BIT(SDE_INTF_PANEL_VSYNC_TS) | BIT(SDE_INTF_MDP_VSYNC_TS)))) {
val = BIT(0);
if (intf->cap->features & SDE_INTF_VSYNC_TS_SRC_EN)
val |= BIT(5);
SDE_REG_WRITE(c, INTF_VSYNC_TIMESTAMP_CTRL, val);
}
return 0;
}