Merge "disp: msm: sde: update QoS values on FPS switch"

This commit is contained in:
qctecmdr
2020-04-21 18:35:16 -07:00
committed by Gerrit - the friendly Code Review server
5 changed files with 39 additions and 3 deletions

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@@ -5332,6 +5332,23 @@ exit:
return ret; return ret;
} }
void sde_crtc_set_qos_dirty(struct drm_crtc *crtc)
{
struct drm_plane *plane;
struct drm_plane_state *state;
struct sde_plane_state *pstate;
drm_atomic_crtc_for_each_plane(plane, crtc) {
state = plane->state;
if (!state)
continue;
pstate = to_sde_plane_state(state);
pstate->dirty |= SDE_PLANE_DIRTY_QOS;
}
}
/** /**
* sde_crtc_atomic_get_property - retrieve a crtc drm property * sde_crtc_atomic_get_property - retrieve a crtc drm property
* @crtc: Pointer to drm crtc structure * @crtc: Pointer to drm crtc structure

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@@ -819,6 +819,13 @@ void sde_crtc_timeline_status(struct drm_crtc *crtc);
void sde_crtc_update_cont_splash_settings( void sde_crtc_update_cont_splash_settings(
struct drm_crtc *crtc); struct drm_crtc *crtc);
/**
* sde_crtc_set_qos_dirty - update plane dirty flag to include
* QoS reprogramming which is required during fps switch
* @crtc: Pointer to drm crtc structure
*/
void sde_crtc_set_qos_dirty(struct drm_crtc *crtc);
/** /**
* sde_crtc_misr_setup - to configure and enable/disable MISR * sde_crtc_misr_setup - to configure and enable/disable MISR
* @crtc: Pointer to drm crtc structure * @crtc: Pointer to drm crtc structure

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@@ -2122,6 +2122,8 @@ static void sde_encoder_virt_mode_set(struct drm_encoder *drm_enc,
} }
drm_connector_list_iter_end(&conn_iter); drm_connector_list_iter_end(&conn_iter);
sde_crtc_set_qos_dirty(sde_enc->crtc);
if (!conn) { if (!conn) {
SDE_ERROR_ENC(sde_enc, "failed to find attached connector\n"); SDE_ERROR_ENC(sde_enc, "failed to find attached connector\n");
return; return;

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@@ -3129,7 +3129,9 @@ static void _sde_plane_update_properties(struct drm_plane *plane,
psde->pipe_hw->ops.setup_sharpening) psde->pipe_hw->ops.setup_sharpening)
_sde_plane_update_sharpening(psde); _sde_plane_update_sharpening(psde);
_sde_plane_set_qos_lut(plane, crtc, fb); if (pstate->dirty & (SDE_PLANE_DIRTY_QOS | SDE_PLANE_DIRTY_RECTS |
SDE_PLANE_DIRTY_FORMAT))
_sde_plane_set_qos_lut(plane, crtc, fb);
if (plane->type != DRM_PLANE_TYPE_CURSOR) { if (plane->type != DRM_PLANE_TYPE_CURSOR) {
_sde_plane_set_qos_ctrl(plane, true, SDE_PLANE_QOS_PANIC_CTRL); _sde_plane_set_qos_ctrl(plane, true, SDE_PLANE_QOS_PANIC_CTRL);
@@ -3138,7 +3140,8 @@ static void _sde_plane_update_properties(struct drm_plane *plane,
_sde_plane_set_ts_prefill(plane, pstate); _sde_plane_set_ts_prefill(plane, pstate);
} }
_sde_plane_set_qos_remap(plane); if (pstate->dirty & SDE_PLANE_DIRTY_QOS)
_sde_plane_set_qos_remap(plane);
/* clear dirty */ /* clear dirty */
pstate->dirty = 0x0; pstate->dirty = 0x0;
@@ -3155,6 +3158,7 @@ static int sde_plane_sspp_atomic_update(struct drm_plane *plane,
struct drm_framebuffer *fb; struct drm_framebuffer *fb;
int idx; int idx;
int dirty_prop_flag; int dirty_prop_flag;
bool is_rt;
if (!plane) { if (!plane) {
SDE_ERROR("invalid plane\n"); SDE_ERROR("invalid plane\n");
@@ -3231,12 +3235,17 @@ static int sde_plane_sspp_atomic_update(struct drm_plane *plane,
_sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb); _sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb);
is_rt = sde_crtc_is_rt_client(crtc, crtc->state);
if (is_rt != psde->is_rt_pipe) {
psde->is_rt_pipe = is_rt;
pstate->dirty |= SDE_PLANE_DIRTY_QOS;
}
/* early out if nothing dirty */ /* early out if nothing dirty */
if (!pstate->dirty) if (!pstate->dirty)
return 0; return 0;
pstate->pending = true; pstate->pending = true;
psde->is_rt_pipe = sde_crtc_is_rt_client(crtc, crtc->state);
_sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL); _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
_sde_plane_update_properties(plane, crtc, fb); _sde_plane_update_properties(plane, crtc, fb);

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@@ -36,6 +36,7 @@
#define SDE_PLANE_DIRTY_VIG_IGC 0x40 #define SDE_PLANE_DIRTY_VIG_IGC 0x40
#define SDE_PLANE_DIRTY_DMA_IGC 0x80 #define SDE_PLANE_DIRTY_DMA_IGC 0x80
#define SDE_PLANE_DIRTY_DMA_GC 0x100 #define SDE_PLANE_DIRTY_DMA_GC 0x100
#define SDE_PLANE_DIRTY_QOS 0x200
#define SDE_PLANE_DIRTY_CP (SDE_PLANE_DIRTY_VIG_GAMUT |\ #define SDE_PLANE_DIRTY_CP (SDE_PLANE_DIRTY_VIG_GAMUT |\
SDE_PLANE_DIRTY_VIG_IGC | SDE_PLANE_DIRTY_DMA_IGC |\ SDE_PLANE_DIRTY_VIG_IGC | SDE_PLANE_DIRTY_DMA_IGC |\
SDE_PLANE_DIRTY_DMA_GC) SDE_PLANE_DIRTY_DMA_GC)