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@@ -27,6 +27,9 @@
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#define SEC_LANE_CP_REG_LEN 32
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#define MAX_PHY_MSK_PER_REG 4
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+/* Mask to enable skew calibration registers */
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+#define SKEW_CAL_MASK 0x2
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+
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static int csiphy_dump;
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module_param(csiphy_dump, int, 0644);
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@@ -345,6 +348,8 @@ int32_t cam_cmd_buf_parser(struct csiphy_device *csiphy_dev,
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cam_cmd_csiphy_info->data_rate;
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csiphy_dev->csiphy_info[index].secure_mode =
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cam_cmd_csiphy_info->secure_mode;
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+ csiphy_dev->csiphy_info[index].mipi_flags =
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+ cam_cmd_csiphy_info->mipi_flags;
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lane_assign = csiphy_dev->csiphy_info[index].lane_assign;
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lane_cnt = csiphy_dev->csiphy_info[index].lane_cnt;
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@@ -596,6 +601,7 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev,
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uint8_t lane_cnt;
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int max_lanes = 0;
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uint16_t settle_cnt = 0;
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+ uint8_t skew_cal_enable = 0;
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uint64_t intermediate_var;
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uint8_t lane_pos = 0;
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int index;
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@@ -735,6 +741,8 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev,
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intermediate_var = csiphy_dev->csiphy_info[index].settle_time;
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do_div(intermediate_var, 200000000);
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settle_cnt = intermediate_var;
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+ skew_cal_enable =
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+ csiphy_dev->csiphy_info[index].mipi_flags & SKEW_CAL_MASK;
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for (lane_pos = 0; lane_pos < max_lanes; lane_pos++) {
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CAM_DBG(CAM_CSIPHY, "lane_pos: %d is configuring", lane_pos);
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@@ -760,6 +768,12 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev,
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csiphybase +
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reg_array[lane_pos][i].reg_addr);
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break;
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+ case CSIPHY_SKEW_CAL:
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+ if (skew_cal_enable)
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+ cam_io_w_mb(reg_array[lane_pos][i].reg_data,
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+ csiphybase +
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+ reg_array[lane_pos][i].reg_addr);
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+ break;
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default:
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CAM_DBG(CAM_CSIPHY, "Do Nothing");
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break;
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