qcacmn: fix HW CC compilation issue on 32bits system
fix compilation issue on 32bits system for HW cookie conversion change. Change-Id: I24ef02f61d55fb0402a1312a76e39303ab761f41 CRs-Fixed: 2980021
This commit is contained in:

committed by
Madan Koyyalamudi

parent
fea75dc9eb
commit
a566938d33
@@ -124,8 +124,11 @@ struct dp_spt_page_desc_list {
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uint16_t num_spt_pages;
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uint16_t num_spt_pages;
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};
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};
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/* HW reading 8 bytes for VA */
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#define DP_CC_HW_READ_BYTES 8
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#define DP_CC_SPT_PAGE_UPDATE_VA(_page_base_va, _index, _desc_va) \
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#define DP_CC_SPT_PAGE_UPDATE_VA(_page_base_va, _index, _desc_va) \
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{ (_page_base_va)[_index] = (uintptr_t)(_desc_va); }
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{ *((uintptr_t *)((_page_base_va) + (_index) * DP_CC_HW_READ_BYTES)) \
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= (uintptr_t)(_desc_va); }
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/**
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/**
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* struct dp_tx_bank_profile - DP wrapper for TCL banks
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* struct dp_tx_bank_profile - DP wrapper for TCL banks
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@@ -326,14 +329,14 @@ static inline uint32_t dp_cc_desc_id_generate(uint16_t ppt_index,
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*
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*
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* Return: TX/RX Desc virtual address
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* Return: TX/RX Desc virtual address
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*/
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*/
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static inline void *dp_cc_desc_find(struct dp_soc *soc,
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static inline uintptr_t dp_cc_desc_find(struct dp_soc *soc,
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uint32_t desc_id,
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uint32_t desc_id,
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bool page_4k_align)
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bool page_4k_align)
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{
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{
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struct dp_soc_be *be_soc;
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struct dp_soc_be *be_soc;
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struct dp_hw_cookie_conversion_t *cc_ctx;
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struct dp_hw_cookie_conversion_t *cc_ctx;
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uint16_t ppt_page_id, spt_va_id;
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uint16_t ppt_page_id, spt_va_id;
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uint64_t *spt_page_va;
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uint8_t *spt_page_va;
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be_soc = dp_get_be_soc_from_dp_soc(soc);
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be_soc = dp_get_be_soc_from_dp_soc(soc);
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cc_ctx = &be_soc->hw_cc_ctx;
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cc_ctx = &be_soc->hw_cc_ctx;
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@@ -357,16 +360,13 @@ static inline void *dp_cc_desc_find(struct dp_soc *soc,
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/*
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/*
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* ppt index in cmem is same order where the page in the
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* ppt index in cmem is same order where the page in the
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* page desc array during initialization.
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* page desc array during initialization.
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* entry size in DDR page is 64 bits, then
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* entry size in DDR page is 64 bits, for 32 bits system,
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* (1) 64 bits OS, (uint64_t *) --> (void *) conversion, no issue.
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* only lower 32 bits VA value is needed.
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* (2) 32 bits OS, TX/RX Desc VA size is 32bits, (uint64_t *) -->
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* (void *) conversion, lower 32 bits from uint64_t is saved, no issue
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* as higer 32 bits is 0.
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*/
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*/
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spt_page_va =
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spt_page_va = cc_ctx->page_desc_base[ppt_page_id].page_v_addr;
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(uint64_t *)cc_ctx->page_desc_base[ppt_page_id].page_v_addr;
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return (void *)(uintptr_t)(*(spt_page_va + spt_va_id));
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return (*((uintptr_t *)(spt_page_va +
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spt_va_id * DP_CC_HW_READ_BYTES)));
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}
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}
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#ifdef WLAN_FEATURE_NEAR_FULL_IRQ
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#ifdef WLAN_FEATURE_NEAR_FULL_IRQ
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@@ -175,7 +175,7 @@ more_data:
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break;
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break;
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}
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}
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rx_desc = (struct dp_rx_desc *)(uintptr_t)
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rx_desc = (struct dp_rx_desc *)
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hal_rx_get_reo_desc_va(ring_desc);
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hal_rx_get_reo_desc_va(ring_desc);
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dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
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dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
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@@ -306,12 +306,18 @@ static inline uint8_t hal_rx_wbm_get_cookie_convert_done(void *hal_desc)
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*
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*
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* Return: RX descriptor virtual address
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* Return: RX descriptor virtual address
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*/
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*/
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static inline uint64_t hal_rx_wbm_get_desc_va(void *hal_desc)
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static inline uintptr_t hal_rx_wbm_get_desc_va(void *hal_desc)
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{
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{
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return HAL_RX_GET(hal_desc, WBM2SW_COMPLETION_RING_RX,
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uint64_t va_from_desc;
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va_from_desc = HAL_RX_GET(hal_desc,
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WBM2SW_COMPLETION_RING_RX,
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BUFFER_VIRT_ADDR_31_0) |
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BUFFER_VIRT_ADDR_31_0) |
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(((uint64_t)HAL_RX_GET(hal_desc, WBM2SW_COMPLETION_RING_RX,
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(((uint64_t)HAL_RX_GET(hal_desc,
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WBM2SW_COMPLETION_RING_RX,
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BUFFER_VIRT_ADDR_63_32)) << 32);
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BUFFER_VIRT_ADDR_63_32)) << 32);
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return (uintptr_t)va_from_desc;
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}
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}
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#define HAL_RX_WBM_FIRST_MSDU_GET(wbm_desc) \
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#define HAL_RX_WBM_FIRST_MSDU_GET(wbm_desc) \
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@@ -417,12 +423,18 @@ hal_rx_msdu_desc_info_get_be(void *desc_addr,
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*
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*
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* Return: RX descriptor virtual address
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* Return: RX descriptor virtual address
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*/
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*/
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static inline uint64_t hal_rx_get_reo_desc_va(void *reo_desc)
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static inline uintptr_t hal_rx_get_reo_desc_va(void *reo_desc)
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{
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{
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return HAL_RX_GET(reo_desc, REO_DESTINATION_RING,
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uint64_t va_from_desc;
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va_from_desc = HAL_RX_GET(reo_desc,
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REO_DESTINATION_RING,
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BUFFER_VIRT_ADDR_31_0) |
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BUFFER_VIRT_ADDR_31_0) |
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(((uint64_t)HAL_RX_GET(reo_desc, REO_DESTINATION_RING,
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(((uint64_t)HAL_RX_GET(reo_desc,
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REO_DESTINATION_RING,
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BUFFER_VIRT_ADDR_63_32)) << 32);
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BUFFER_VIRT_ADDR_63_32)) << 32);
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return (uintptr_t)va_from_desc;
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}
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}
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#endif /* _HAL_BE_RX_H_ */
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#endif /* _HAL_BE_RX_H_ */
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@@ -309,14 +309,19 @@ static inline uint8_t hal_tx_comp_get_cookie_convert_done(void *hal_desc)
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*
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*
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* Return: TX desc virtual address
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* Return: TX desc virtual address
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*/
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*/
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static inline uint64_t hal_tx_comp_get_desc_va(void *hal_desc)
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static inline uintptr_t hal_tx_comp_get_desc_va(void *hal_desc)
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{
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{
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return HAL_TX_DESC_GET(hal_desc, WBM2SW_COMPLETION_RING_TX,
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uint64_t va_from_desc;
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va_from_desc = HAL_TX_DESC_GET(hal_desc,
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WBM2SW_COMPLETION_RING_TX,
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BUFFER_VIRT_ADDR_31_0) |
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BUFFER_VIRT_ADDR_31_0) |
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(((uint64_t)HAL_TX_DESC_GET(
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(((uint64_t)HAL_TX_DESC_GET(
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hal_desc,
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hal_desc,
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WBM2SW_COMPLETION_RING_TX,
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WBM2SW_COMPLETION_RING_TX,
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BUFFER_VIRT_ADDR_63_32)) << 32);
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BUFFER_VIRT_ADDR_63_32)) << 32);
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return (uintptr_t)va_from_desc;
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}
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}
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/*---------------------------------------------------------------------------
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/*---------------------------------------------------------------------------
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