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@@ -531,6 +531,14 @@ static u32 sde_hw_intf_get_underrun_line_count(struct sde_hw_intf *intf)
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0xebadebad;
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0xebadebad;
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}
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}
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+static u32 sde_hw_intf_get_intr_status(struct sde_hw_intf *intf)
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+{
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+ if (!intf)
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+ return -EINVAL;
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+
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+ return SDE_REG_READ(&intf->hw, INTF_INTR_STATUS);
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+}
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+
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static int sde_hw_intf_setup_te_config(struct sde_hw_intf *intf,
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static int sde_hw_intf_setup_te_config(struct sde_hw_intf *intf,
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struct sde_hw_tear_check *te)
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struct sde_hw_tear_check *te)
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{
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{
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@@ -783,6 +791,7 @@ static void _setup_intf_ops(struct sde_hw_intf_ops *ops,
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ops->collect_misr = sde_hw_intf_collect_misr;
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ops->collect_misr = sde_hw_intf_collect_misr;
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ops->get_line_count = sde_hw_intf_get_line_count;
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ops->get_line_count = sde_hw_intf_get_line_count;
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ops->get_underrun_line_count = sde_hw_intf_get_underrun_line_count;
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ops->get_underrun_line_count = sde_hw_intf_get_underrun_line_count;
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+ ops->get_intr_status = sde_hw_intf_get_intr_status;
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ops->avr_setup = sde_hw_intf_avr_setup;
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ops->avr_setup = sde_hw_intf_avr_setup;
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ops->avr_trigger = sde_hw_intf_avr_trigger;
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ops->avr_trigger = sde_hw_intf_avr_trigger;
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ops->avr_ctrl = sde_hw_intf_avr_ctrl;
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ops->avr_ctrl = sde_hw_intf_avr_ctrl;
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