diff --git a/msm/sde/sde_encoder_phys_vid.c b/msm/sde/sde_encoder_phys_vid.c index d9e1a07ea4..2473959260 100644 --- a/msm/sde/sde_encoder_phys_vid.c +++ b/msm/sde/sde_encoder_phys_vid.c @@ -1198,6 +1198,7 @@ static u32 sde_encoder_phys_vid_get_underrun_line_count( struct sde_encoder_phys *phys_enc) { u32 underrun_linecount = 0xebadebad; + u32 intf_intr_status = 0xebadebad; struct intf_status intf_status = {0}; if (!phys_enc) @@ -1215,8 +1216,13 @@ static u32 sde_encoder_phys_vid_get_underrun_line_count( phys_enc->hw_intf->ops.get_underrun_line_count( phys_enc->hw_intf); + if (phys_enc->hw_intf->ops.get_intr_status) + intf_intr_status = phys_enc->hw_intf->ops.get_intr_status( + phys_enc->hw_intf); + SDE_EVT32(DRMID(phys_enc->parent), underrun_linecount, - intf_status.frame_count, intf_status.line_count); + intf_status.frame_count, intf_status.line_count, + intf_intr_status); return underrun_linecount; } diff --git a/msm/sde/sde_hw_intf.c b/msm/sde/sde_hw_intf.c index b52a21347a..7dc8401fab 100644 --- a/msm/sde/sde_hw_intf.c +++ b/msm/sde/sde_hw_intf.c @@ -531,6 +531,14 @@ static u32 sde_hw_intf_get_underrun_line_count(struct sde_hw_intf *intf) 0xebadebad; } +static u32 sde_hw_intf_get_intr_status(struct sde_hw_intf *intf) +{ + if (!intf) + return -EINVAL; + + return SDE_REG_READ(&intf->hw, INTF_INTR_STATUS); +} + static int sde_hw_intf_setup_te_config(struct sde_hw_intf *intf, struct sde_hw_tear_check *te) { @@ -783,6 +791,7 @@ static void _setup_intf_ops(struct sde_hw_intf_ops *ops, ops->collect_misr = sde_hw_intf_collect_misr; ops->get_line_count = sde_hw_intf_get_line_count; ops->get_underrun_line_count = sde_hw_intf_get_underrun_line_count; + ops->get_intr_status = sde_hw_intf_get_intr_status; ops->avr_setup = sde_hw_intf_avr_setup; ops->avr_trigger = sde_hw_intf_avr_trigger; ops->avr_ctrl = sde_hw_intf_avr_ctrl; diff --git a/msm/sde/sde_hw_intf.h b/msm/sde/sde_hw_intf.h index dc6aa456a9..8aafe8f4f1 100644 --- a/msm/sde/sde_hw_intf.h +++ b/msm/sde/sde_hw_intf.h @@ -206,6 +206,11 @@ struct sde_hw_intf_ops { * Enable processing of 2 pixels per clock */ void (*enable_wide_bus)(struct sde_hw_intf *intf, bool enable); + + /** + * Get the INTF interrupt status + */ + u32 (*get_intr_status)(struct sde_hw_intf *intf); }; struct sde_hw_intf {