From a4b5f900be70d3cf8db62dad28930718993de056 Mon Sep 17 00:00:00 2001 From: Houston Hoffman Date: Thu, 5 Jan 2017 18:51:19 -0800 Subject: [PATCH] qcacmn: Don't flush irq_enable register write The Common subsystem shutdown is allowed after the irq_enable register is written. A race condition in host (multiple other interrupts firing on the same core). Can delay the register read and allow the common sub system to be shutdown before the read. The read would then cause an SNOC error as the register is unclocked. Change-Id: Icb90c185eabcbd63b28b02bdf5c1de2d06d3620e CRs-Fixed: 1108494 --- hif/src/snoc/hif_io32_snoc.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hif/src/snoc/hif_io32_snoc.h b/hif/src/snoc/hif_io32_snoc.h index 1fe76f1304..417e01eb21 100644 --- a/hif/src/snoc/hif_io32_snoc.h +++ b/hif/src/snoc/hif_io32_snoc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved. + * Copyright (c) 2015-2017 The Linux Foundation. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * @@ -47,7 +47,6 @@ static inline void ce_enable_irq_in_individual_register(struct hif_softc *scn, uint32_t offset; offset = HOST_IE_ADDRESS + CE_BASE_ADDRESS(ce_id); hif_write32_mb(scn->mem + offset, 1); - hif_read32_mb(scn->mem + offset); } static inline void ce_disable_irq_in_individual_register(struct hif_softc *scn,