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qcacmn: Add support to map generic shadow regs

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Add apis to map generic registers to shadow region. Existing
logic includes mapping only srng based regs to the shadow
region.
Add support to map REO control regs and WBM2SW2 rel
ring HP reg address to the shadow region in case the direct
reg writes in IPA enable/disable autonomy fail due to UMAC
block being in a power collapsed state.
Shadow reg mapping for these regs is provided to FW during
init. Add stat shadow_reg_write_fail to track shadow reg
write failure and shadow_reg_write_succ to track successful
shadow writes.

Change-Id: I04790765a3de80047689657e2cad0b73123440b9
CRs-Fixed: 2790321
This commit is contained in:
Nisha Menon
2020-10-10 21:05:47 -07:00
committed by snandini
parent 43757caf1b
commit a377301c78
9 changed files with 363 additions and 29 deletions
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40
hal/wifi3.0/hal_internal.h
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@@ -440,6 +440,26 @@ struct hal_hw_srng_config {
};
#define MAX_SHADOW_REGISTERS 36
#define MAX_GENERIC_SHADOW_REG 5
/**
* struct shadow_reg_config - Hal soc structure that contains
* the list of generic shadow registers
* @target_register: target reg offset
* @shadow_config_index: shadow config index in shadow config
* list sent to FW
* @va: virtual addr of shadow reg
*
* This structure holds the generic registers that are mapped to
* the shadow region and holds the mapping of the target
* register offset to shadow config index provided to FW during
* init
*/
struct shadow_reg_config {
uint32_t target_register;
int shadow_config_index;
uint64_t va;
};
/* REO parameters to be passed to hal_reo_setup */
struct hal_reo_params {
@@ -628,6 +648,8 @@ struct hal_hw_txrx_ops {
* struct hal_soc_stats - Hal layer stats
* @reg_write_fail: number of failed register writes
* @wstats: delayed register write stats
* @shadow_reg_write_fail: shadow reg write failure stats
* @shadow_reg_write_succ: shadow reg write success stats
*
* This structure holds all the statistics at HAL layer.
*/
@@ -636,6 +658,10 @@ struct hal_soc_stats {
#ifdef FEATURE_HAL_DELAYED_REG_WRITE
struct hal_reg_write_soc_stats wstats;
#endif
#ifdef GENERIC_SHADOW_REGISTER_ACCESS_ENABLE
uint32_t shadow_reg_write_fail;
uint32_t shadow_reg_write_succ;
#endif
};
#ifdef ENABLE_HAL_REG_WR_HISTORY
@@ -673,8 +699,13 @@ struct hal_reg_write_fail_history {
#endif
/**
* HAL context to be used to access SRNG APIs (currently used by data path
* and transport (CE) modules)
* struct hal_soc - HAL context to be used to access SRNG APIs
* (currently used by data path and
* transport (CE) modules)
* @list_shadow_reg_config: array of generic regs mapped to
* shadow regs
* @num_generic_shadow_regs_configured: number of generic regs
* mapped to shadow regs
*/
struct hal_soc {
/* HIF handle to access HW registers */
@@ -741,6 +772,11 @@ struct hal_soc {
uint32_t read_idx;
#endif
qdf_atomic_t active_work_cnt;
#ifdef GENERIC_SHADOW_REGISTER_ACCESS_ENABLE
struct shadow_reg_config
list_shadow_reg_config[MAX_GENERIC_SHADOW_REG];
int num_generic_shadow_regs_configured;
#endif
};
#ifdef FEATURE_HAL_DELAYED_REG_WRITE