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qcacmn: Add sanity check for BA window size in DP

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The original BA window size given from CP might > max DP supported,
add sanity check based on HAL target allowed.

Change-Id: Ibadaddeffe65165a89d580d8a5cbf5f7c724c809
CRs-Fixed: 3193852
This commit is contained in:
Jinwei Chen
2022-05-11 04:48:17 -07:00
committed by Madan Koyyalamudi
parent bf92ed7b61
commit a3585f6fe8
9 changed files with 60 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
dp/wifi3.0/dp_peer.c
View File

@@ -4293,15 +4293,23 @@ static void dp_check_ba_buffersize(struct dp_peer *peer,
uint16_t buffersize)
{
struct dp_rx_tid *rx_tid = NULL;
struct dp_soc *soc = peer->vdev->pdev->soc;
uint16_t max_ba_window;
max_ba_window = hal_get_rx_max_ba_window(soc->hal_soc, tid);
dp_info("Input buffersize %d, max dp allowed %d",
buffersize, max_ba_window);
/* Adjust BA window size, restrict it to max DP allowed */
buffersize = QDF_MIN(buffersize, max_ba_window);
dp_info(QDF_MAC_ADDR_FMT" per_tid_basize_max_tid %d tid %d buffersize %d hw_buffer_size %d",
peer->mac_addr.raw,
peer->vdev->pdev->soc->per_tid_basize_max_tid, tid, buffersize,
soc->per_tid_basize_max_tid, tid, buffersize,
peer->hw_buffer_size);
rx_tid = &peer->rx_tid[tid];
if (peer->vdev->pdev->soc->per_tid_basize_max_tid &&
tid < peer->vdev->pdev->soc->per_tid_basize_max_tid) {
if (soc->per_tid_basize_max_tid &&
tid < soc->per_tid_basize_max_tid) {
rx_tid->ba_win_size = buffersize;
goto out;
} else {

8
hal/wifi3.0/be/hal_be_generic_api.c
View File

@@ -163,13 +163,18 @@ void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
cookie);
}
static uint16_t hal_get_rx_max_ba_window_be(int tid)
{
return HAL_RX_BA_WINDOW_256;
}
static uint32_t hal_get_reo_qdesc_size_be(uint32_t ba_window_size, int tid)
{
/* Hardcode the ba_window_size to HAL_RX_MAX_BA_WINDOW for
* NON_QOS_TID until HW issues are resolved.
*/
if (tid != HAL_NON_QOS_TID)
ba_window_size = HAL_RX_MAX_BA_WINDOW;
ba_window_size = hal_get_rx_max_ba_window_be(tid);
/* Return descriptor size corresponding to window size of 2 since
* we set ba_window_size to 2 while setting up REO descriptors as
@@ -1045,6 +1050,7 @@ hal_rx_wbm_rel_buf_paddr_get_be(hal_ring_desc_t rx_desc,
void hal_hw_txrx_default_ops_attach_be(struct hal_soc *hal_soc)
{
hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_be;
hal_soc->ops->hal_get_rx_max_ba_window = hal_get_rx_max_ba_window_be;
hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_be;
hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_be;
hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_be;

2
hal/wifi3.0/be/hal_be_rx.h
View File

@@ -30,8 +30,6 @@
#define HAL_RX_DA_IDX_PEER_ID_MASK 0x3fff
#define HAL_RX_DA_IDX_ML_PEER_MASK 0x2000
#define HAL_RX_MAX_BA_WINDOW_BE 1024
/*
* macro to set the cookie into the rxdma ring entry
*/

3
hal/wifi3.0/hal_api.h
View File

@@ -2427,7 +2427,8 @@ enum hal_pn_type {
HAL_PN_WAPI_UNEVEN,
};
#define HAL_RX_MAX_BA_WINDOW 256
#define HAL_RX_BA_WINDOW_256 256
#define HAL_RX_BA_WINDOW_1024 1024
/**
* hal_get_reo_qdesc_align - Get start address alignment for reo

16
hal/wifi3.0/hal_hw_headers.h
View File

@@ -380,6 +380,22 @@ uint32_t hal_get_reo_qdesc_size(hal_soc_handle_t hal_soc_hdl,
return sizeof(struct rx_reo_queue);
}
/**
* hal_get_rx_max_ba_window - Get RX max BA window size per target
* @hal_soc: Opaque HAL SOC handle
* @tid: TID number
*
* Return: Max RX BA window size
*/
static inline
uint16_t hal_get_rx_max_ba_window(hal_soc_handle_t hal_soc_hdl,
int tid)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
return hal_soc->ops->hal_get_rx_max_ba_window(tid);
}
/**
* hal_get_idle_link_bm_id() - Get idle link BM id from chid_id
* @chip_id: mlo chip_id

1
hal/wifi3.0/hal_internal.h
View File

@@ -946,6 +946,7 @@ struct hal_hw_txrx_ops {
uint32_t *reo_destination_indication);
uint8_t (*hal_tx_get_num_tcl_banks)(void);
uint32_t (*hal_get_reo_qdesc_size)(uint32_t ba_window_size, int tid);
uint16_t (*hal_get_rx_max_ba_window)(int tid);
void (*hal_set_link_desc_addr)(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr,

8
hal/wifi3.0/kiwi/hal_kiwi.c
View File

@@ -1641,6 +1641,11 @@ static inline uint8_t hal_get_first_wow_wakeup_packet_kiwi(uint8_t *buf)
}
#endif
static uint16_t hal_get_rx_max_ba_window_kiwi(int tid)
{
return HAL_RX_BA_WINDOW_1024;
}
/**
* hal_get_reo_qdesc_size_kiwi()- Get the reo queue descriptor size
* from the give Block-Ack window size
@@ -1652,7 +1657,7 @@ static uint32_t hal_get_reo_qdesc_size_kiwi(uint32_t ba_window_size, int tid)
* NON_QOS_TID until HW issues are resolved.
*/
if (tid != HAL_NON_QOS_TID)
ba_window_size = HAL_RX_MAX_BA_WINDOW_BE;
ba_window_size = hal_get_rx_max_ba_window_kiwi(tid);
/* Return descriptor size corresponding to window size of 2 since
* we set ba_window_size to 2 while setting up REO descriptors as
@@ -1696,6 +1701,7 @@ static void hal_hw_txrx_ops_attach_kiwi(struct hal_soc *hal_soc)
hal_soc->ops->hal_reo_enable_pn_in_dest =
hal_reo_enable_pn_in_dest_kiwi;
/* Overwrite the default BE ops */
hal_soc->ops->hal_get_rx_max_ba_window = hal_get_rx_max_ba_window_kiwi;
hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_kiwi;
/* tx */

9
hal/wifi3.0/li/hal_li_generic_api.c
View File

@@ -26,13 +26,18 @@
#include "hal_tx.h"
#include <hal_api_mon.h>
static uint16_t hal_get_rx_max_ba_window_li(int tid)
{
return HAL_RX_BA_WINDOW_256;
}
static uint32_t hal_get_reo_qdesc_size_li(uint32_t ba_window_size, int tid)
{
/* Hardcode the ba_window_size to HAL_RX_MAX_BA_WINDOW for
* NON_QOS_TID until HW issues are resolved.
*/
if (tid != HAL_NON_QOS_TID)
ba_window_size = HAL_RX_MAX_BA_WINDOW;
ba_window_size = hal_get_rx_max_ba_window_li(tid);
/* Return descriptor size corresponding to window size of 2 since
* we set ba_window_size to 2 while setting up REO descriptors as
@@ -1176,6 +1181,8 @@ static uint8_t hal_get_idle_link_bm_id_li(uint8_t chip_id)
void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
{
hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_li;
hal_soc->ops->hal_get_rx_max_ba_window =
hal_get_rx_max_ba_window_li;
hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_li;
hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_li;
hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_li;

9
hal/wifi3.0/qcn9224/hal_9224.c
View File

@@ -1642,6 +1642,11 @@ static void hal_reo_setup_9224(struct hal_soc *soc, void *reoparams)
hal_reo_shared_qaddr_init((hal_soc_handle_t)soc);
}
static uint16_t hal_get_rx_max_ba_window_qcn9224(int tid)
{
return HAL_RX_BA_WINDOW_1024;
}
/**
* hal_qcn9224_get_reo_qdesc_size()- Get the reo queue descriptor size
* from the give Block-Ack window size
@@ -1653,7 +1658,7 @@ static uint32_t hal_qcn9224_get_reo_qdesc_size(uint32_t ba_window_size, int tid)
* NON_QOS_TID until HW issues are resolved.
*/
if (tid != HAL_NON_QOS_TID)
ba_window_size = HAL_RX_MAX_BA_WINDOW_BE;
ba_window_size = hal_get_rx_max_ba_window_qcn9224(tid);
/* Return descriptor size corresponding to window size of 2 since
* we set ba_window_size to 2 while setting up REO descriptors as
@@ -1933,6 +1938,8 @@ static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
hal_soc->ops->hal_reo_shared_qaddr_cache_clear = hal_reo_shared_qaddr_cache_clear_be;
#endif
/* Overwrite the default BE ops */
hal_soc->ops->hal_get_rx_max_ba_window =
hal_get_rx_max_ba_window_qcn9224;
hal_soc->ops->hal_get_reo_qdesc_size = hal_qcn9224_get_reo_qdesc_size;
/* TX MONITOR */
#ifdef QCA_MONITOR_2_0_SUPPORT