Răsfoiți Sursa

disp: msm: sde: Add checksum support for LTM for lahaina target

This change adds the support for checksum collection and notifies
to user space as part of drm event.

Change-Id: Ib2a6c38c74d1fb60d274cdb685b74979202604eb
Signed-off-by: Lakshmi Narayana Kalavala <[email protected]>
Lakshmi Narayana Kalavala 5 ani în urmă
părinte
comite
a27534e143

+ 3 - 0
include/uapi/display/drm/msm_drm_pp.h

@@ -484,6 +484,7 @@ struct drm_msm_ad4_roi_cfg {
 
 #define LTM_STATS_SAT (1 << 1)
 #define LTM_STATS_MERGE_SAT (1 << 2)
+#define LTM_HIST_CHECKSUM_SUPPORT (1 << 0)
 
 /*
  * struct drm_msm_ltm_stats_data - LTM stats data structure
@@ -507,6 +508,8 @@ struct drm_msm_ltm_stats_data {
 	__u32 cfg_param_02;
 	__u32 cfg_param_03;
 	__u32 cfg_param_04;
+	__u32 feature_flag;
+	__u32 checksum;
 };
 
 /*

+ 13 - 0
msm/sde/sde_color_processing.c

@@ -3801,6 +3801,19 @@ static void sde_cp_ltm_hist_interrupt_cb(void *arg, int irq_idx)
 	ltm_data = (struct drm_msm_ltm_stats_data *)
 		((u8 *)sde_crtc->ltm_buffers[idx]->kva +
 		sde_crtc->ltm_buffers[idx]->offset);
+
+	hw_dspp = sde_crtc->mixers[0].hw_dspp;
+	if (!hw_dspp) {
+		spin_unlock_irqrestore(&sde_crtc->ltm_lock, irq_flags);
+		DRM_ERROR("invalid dspp for mixer %d\n", i);
+		return;
+	}
+	if (hw_dspp->ltm_checksum_support) {
+		ltm_data->feature_flag |= LTM_HIST_CHECKSUM_SUPPORT;
+		ltm_data->checksum = ltm_data->status_flag;
+	} else
+		ltm_data->feature_flag &= ~LTM_HIST_CHECKSUM_SUPPORT;
+
 	ltm_data->status_flag = ltm_hist_status;
 
 	hw_lm = sde_crtc->mixers[0].hw_lm;

+ 17 - 5
msm/sde/sde_hw_dspp.c

@@ -227,7 +227,8 @@ static void dspp_ltm(struct sde_hw_dspp *c)
 {
 	int ret = 0;
 
-	if (c->cap->sblk->ltm.version == SDE_COLOR_PROCESS_VER(0x1, 0x0)) {
+	if (c->cap->sblk->ltm.version == SDE_COLOR_PROCESS_VER(0x1, 0x0) ||
+		c->cap->sblk->ltm.version == SDE_COLOR_PROCESS_VER(0x1, 0x1)) {
 		ret = reg_dmav1_init_ltm_op_v6(SDE_LTM_INIT, c->idx);
 		if (!ret)
 			ret = reg_dmav1_init_ltm_op_v6(SDE_LTM_ROI, c->idx);
@@ -238,15 +239,26 @@ static void dspp_ltm(struct sde_hw_dspp *c)
 			c->ops.setup_ltm_init = reg_dmav1_setup_ltm_initv1;
 			c->ops.setup_ltm_roi = reg_dmav1_setup_ltm_roiv1;
 			c->ops.setup_ltm_vlut = reg_dmav1_setup_ltm_vlutv1;
+			c->ops.setup_ltm_thresh = sde_setup_dspp_ltm_threshv1;
+			c->ops.setup_ltm_hist_ctrl =
+				sde_setup_dspp_ltm_hist_ctrlv1;
+			c->ops.setup_ltm_hist_buffer =
+				sde_setup_dspp_ltm_hist_bufferv1;
+			c->ops.ltm_read_intr_status = sde_ltm_read_intr_status;
 		} else {
 			c->ops.setup_ltm_init = NULL;
 			c->ops.setup_ltm_roi = NULL;
 			c->ops.setup_ltm_vlut = NULL;
+			c->ops.setup_ltm_thresh = NULL;
+			c->ops.setup_ltm_hist_ctrl = NULL;
+			c->ops.setup_ltm_hist_buffer = NULL;
+			c->ops.ltm_read_intr_status = NULL;
 		}
-		c->ops.setup_ltm_thresh = sde_setup_dspp_ltm_threshv1;
-		c->ops.setup_ltm_hist_ctrl = sde_setup_dspp_ltm_hist_ctrlv1;
-		c->ops.setup_ltm_hist_buffer = sde_setup_dspp_ltm_hist_bufferv1;
-		c->ops.ltm_read_intr_status = sde_ltm_read_intr_status;
+		if (!ret && c->cap->sblk->ltm.version ==
+			SDE_COLOR_PROCESS_VER(0x1, 0x1))
+			c->ltm_checksum_support = true;
+		else
+			c->ltm_checksum_support = false;
 	}
 }
 

+ 2 - 0
msm/sde/sde_hw_dspp.h

@@ -287,6 +287,7 @@ struct sde_hw_dspp_ops {
  * @cap: Pointer to layer_cfg
  * @sb_dma_in_use: hint indicating if sb dma is being used for this dspp
  * @ops: Pointer to operations possible for this DSPP
+ * @ltm_checksum_support: flag to check if checksum present
  */
 struct sde_hw_dspp {
 	struct sde_hw_blk base;
@@ -299,6 +300,7 @@ struct sde_hw_dspp {
 	enum sde_dspp idx;
 	const struct sde_dspp_cfg *cap;
 	bool sb_dma_in_use;
+	bool ltm_checksum_support;
 
 	/* Ops */
 	struct sde_hw_dspp_ops ops;