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@@ -176,6 +176,7 @@ struct tx_macro_priv {
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int bcs_ch;
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bool bcs_clk_en;
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bool hs_slow_insert_complete;
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+ int amic_sample_rate;
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};
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static bool tx_macro_get_data(struct snd_soc_component *component,
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@@ -500,6 +501,29 @@ static void tx_macro_tx_hpf_corner_freq_callback(struct work_struct *work)
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hpf_cut_off_freq << 5);
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snd_soc_component_update_bits(component, hpf_gate_reg,
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0x03, 0x02);
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+ /* Add delay between toggle hpf gate based on sample rate */
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+ switch(tx_priv->amic_sample_rate) {
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+ case 8000:
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+ usleep_range(125, 130);
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+ break;
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+ case 16000:
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+ usleep_range(62, 65);
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+ break;
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+ case 32000:
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+ usleep_range(31, 32);
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+ break;
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+ case 48000:
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+ usleep_range(20, 21);
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+ break;
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+ case 96000:
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+ usleep_range(10, 11);
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+ break;
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+ case 192000:
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+ usleep_range(5, 6);
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+ break;
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+ default:
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+ usleep_range(125, 130);
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+ }
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snd_soc_component_update_bits(component, hpf_gate_reg,
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0x03, 0x01);
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} else {
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@@ -935,6 +959,7 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w,
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u16 dec_cfg_reg = 0;
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u16 hpf_gate_reg = 0;
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u16 tx_gain_ctl_reg = 0;
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+ u16 tx_fs_reg = 0;
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u8 hpf_cut_off_freq = 0;
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u16 adc_mux_reg = 0;
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int hpf_delay = TX_MACRO_DMIC_HPF_DELAY_MS;
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@@ -960,6 +985,11 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w,
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TX_MACRO_TX_PATH_OFFSET * decimator;
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adc_mux_reg = BOLERO_CDC_TX_INP_MUX_ADC_MUX0_CFG1 +
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TX_MACRO_ADC_MUX_CFG_OFFSET * decimator;
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+ tx_fs_reg = BOLERO_CDC_TX0_TX_PATH_CTL +
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+ TX_MACRO_TX_PATH_OFFSET * decimator;
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+
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+ tx_priv->amic_sample_rate = (snd_soc_component_read32(component,
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+ tx_fs_reg) & 0x0F);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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qctecmdr