video: driver: fix space requirement warning

Fix space and blank line required warning.

Change-Id: I2f754e52cdb36332a53b65ca248ae5d974a00ff4
Signed-off-by: Ankush Mitra <[email protected]>

driver/platform/common/inc/msm_vidc_platform_ext.h

@@ -42,6 +42,7 @@ enum v4l2_mpeg_vidc_blur_types {
 	VIDC_BLUR_EXTERNAL           = 0x1,
 	VIDC_BLUR_ADAPTIVE           = 0x2,
 };
+
 /* (blur width) << 16 | (blur height) */
 #define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_RESOLUTION                              \
 	(V4L2_CID_MPEG_VIDC_BASE + 0x11)
@@ -163,6 +164,7 @@ enum v4l2_mpeg_vidc_av1_tier {
 	V4L2_MPEG_VIDC_AV1_TIER_MAIN  = 0,
 	V4L2_MPEG_VIDC_AV1_TIER_HIGH  = 1,
 };
+
 /* Decoder Timestamp Reorder control */
 #define V4L2_CID_MPEG_VIDC_TS_REORDER           (V4L2_CID_MPEG_VIDC_BASE + 0x34)
 /* AV1 Decoder Film Grain */

driver/platform/common/src/msm_vidc_platform.c

@@ -3211,6 +3211,7 @@ static int msm_venc_set_csc_coeff(struct msm_vidc_inst *inst,
 
 	return rc;
 }
+
 int msm_vidc_set_csc_custom_matrix(void *instance,
 	enum msm_vidc_inst_capability_type cap_id)
 {

driver/platform/kalama/src/msm_vidc_kalama.c

@@ -1344,7 +1344,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = {
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
-		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)|
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
 		V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1,
 		V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,

driver/platform/pineapple/src/msm_vidc_pineapple.c

@@ -397,7 +397,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = {
 	 *      hfi_id,
 	 *      flags}
 	 */
-	{DRV_VERSION, DEC|ENC, CODECS_ALL,
+	{DRV_VERSION, DEC | ENC, CODECS_ALL,
 		0, INT_MAX, 1, DRIVER_VERSION,
 		V4L2_CID_MPEG_VIDC_DRIVER_VERSION},
 
@@ -1420,7 +1420,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = {
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
-		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)|
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
 		V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1,
 		V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
@@ -1636,14 +1636,14 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = {
 		HFI_PROP_CONCEAL_COLOR_10BIT,
 		CAP_FLAG_INPUT_PORT},
 
-	{STAGE, DEC|ENC, CODECS_ALL,
+	{STAGE, DEC | ENC, CODECS_ALL,
 		MSM_VIDC_STAGE_1,
 		MSM_VIDC_STAGE_2, 1,
 		MSM_VIDC_STAGE_2,
 		0,
 		HFI_PROP_STAGE},
 
-	{PIPE, DEC|ENC, CODECS_ALL,
+	{PIPE, DEC | ENC, CODECS_ALL,
 		MSM_VIDC_PIPE_1,
 		MSM_VIDC_PIPE_4, 1,
 		MSM_VIDC_PIPE_4,
@@ -1712,7 +1712,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = {
 		HFI_PROP_SEQ_CHANGE_AT_SYNC_FRAME,
 		CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED},
 
-	{PRIORITY, DEC|ENC, CODECS_ALL,
+	{PRIORITY, DEC | ENC, CODECS_ALL,
 		0, 4, 1, 4,
 		V4L2_CID_MPEG_VIDC_PRIORITY,
 		HFI_PROP_SESSION_PRIORITY,
@@ -1753,7 +1753,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = {
 		HFI_PROP_AV1_DRAP_CONFIG,
 		CAP_FLAG_INPUT_PORT},
 
-	{LAST_FLAG_EVENT_ENABLE, DEC|ENC, CODECS_ALL,
+	{LAST_FLAG_EVENT_ENABLE, DEC | ENC, CODECS_ALL,
 		0, 1, 1, 0,
 		V4L2_CID_MPEG_VIDC_LAST_FLAG_EVENT_ENABLE},
 
@@ -2570,7 +2570,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine
 		NULL,
 		msm_vidc_set_stage},
 
-	{PIPE, DEC|ENC, CODECS_ALL,
+	{PIPE, DEC | ENC, CODECS_ALL,
 		{0},
 		NULL,
 		msm_vidc_set_pipe},
@@ -2590,7 +2590,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_pine
 		NULL,
 		msm_vidc_set_u32},
 
-	{PRIORITY, DEC|ENC, CODECS_ALL,
+	{PRIORITY, DEC | ENC, CODECS_ALL,
 		{0},
 		msm_vidc_adjust_session_priority,
 		msm_vidc_set_session_priority},

driver/platform/pineapple/src/pineapple.c

@@ -1048,7 +1048,7 @@ static struct msm_platform_inst_capability instance_cap_data_pineapple[] = {
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
-		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)|
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
 		V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1,
 		V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,

driver/platform/waipio/src/waipio.c

@@ -982,7 +982,7 @@ static struct msm_platform_inst_capability instance_cap_data_waipio[] = {
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
-		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1)|
+		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
 		BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
 		V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1,
 		V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,

driver/variant/iris2/src/msm_vidc_iris2.c

@@ -182,7 +182,7 @@ static int __interrupt_init_iris2(struct msm_vidc_core *core)
 		return rc;
 
 	/* Write 0 to unmask CPU and WD interrupts */
-	mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2|
+	mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS2 |
 			WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS2);
 	rc = __write_register(core, WRAPPER_INTR_MASK_IRIS2, mask_val);
 	if (rc)

driver/variant/iris3/src/msm_vidc_iris3.c

@@ -188,7 +188,7 @@ static int __interrupt_init_iris3(struct msm_vidc_core *core)
 		return rc;
 
 	/* Write 0 to unmask CPU and WD interrupts */
-	mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS3|
+	mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS3 |
 			WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS3);
 	rc = __write_register(core, WRAPPER_INTR_MASK_IRIS3, mask_val);
 	if (rc)

driver/variant/iris33/src/msm_vidc_iris33.c

@@ -145,7 +145,7 @@ static int __interrupt_init_iris33(struct msm_vidc_core *core)
 		return rc;
 
 	/* Write 0 to unmask CPU and WD interrupts */
-	mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS33|
+	mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BMSK_IRIS33 |
 			WRAPPER_INTR_MASK_A2HCPU_BMSK_IRIS33);
 	rc = __write_register(core, WRAPPER_INTR_MASK_IRIS33, mask_val);
 	if (rc)

driver/vidc/inc/hfi_property.h

@@ -27,6 +27,7 @@ enum hfi_debug_config {
     HFI_DEBUG_CONFIG_WFI     = 0x00000002,
     HFI_DEBUG_CONFIG_ARM9WD  = 0x00000004,
 };
+
 #define HFI_PROP_DEBUG_CONFIG                                   0x0300000a
 
 enum hfi_debug_log_level {
@@ -44,6 +45,7 @@ struct hfi_debug_header {
 	u32   debug_level;
 	u32   reserved[2];
 };
+
 #define HFI_PROP_DEBUG_LOG_LEVEL                                0x0300000b
 
 #define HFI_PROP_FENCE_CLIENT_DATA                              0x0300000d
@@ -57,6 +59,7 @@ enum hfi_codec_type {
     HFI_CODEC_DECODE_MPEG2 = 6,
     HFI_CODEC_DECODE_AV1   = 7,
 };
+
 #define HFI_PROP_CODEC                                          0x03000100
 
 enum hfi_color_format {
@@ -69,6 +72,7 @@ enum hfi_color_format {
     HFI_COLOR_FMT_RGBA8888_UBWC = 6,
     HFI_COLOR_FMT_NV21          = 7,
 };
+
 #define HFI_PROP_COLOR_FORMAT                                   0x03000101
 
 #define HFI_PROP_SECURE                                         0x03000102
@@ -276,6 +280,7 @@ enum hfi_deblock_mode {
     HFI_DEBLOCK_DISABLE                   = 0x1,
     HFI_DEBLOCK_DISABLE_AT_SLICE_BOUNDARY = 0x2,
 };
+
 #define HFI_PROP_DEBLOCKING_MODE                                0x03000129
 
 enum hfi_rate_control {
@@ -286,6 +291,7 @@ enum hfi_rate_control {
     HFI_RC_CBR_VFR        = 0x00000004,
     HFI_RC_LOSSLESS       = 0x00000005,
 };
+
 #define HFI_PROP_RATE_CONTROL                                   0x0300012a
 
 #define HFI_PROP_TIME_DELTA_BASED_RATE_CONTROL                  0x0300012b
@@ -324,6 +330,7 @@ enum hfi_layer_encoding_type {
     HFI_HIER_P_HYBRID_LTR     = 0x2,
     HFI_HIER_B                = 0x3,
 };
+
 #define HFI_PROP_LAYER_ENCODING_TYPE                            0x03000138
 
 #define HFI_PROP_LAYER_COUNT                                    0x03000139
@@ -332,6 +339,7 @@ enum hfi_chromaqp_offset_mode {
     HFI_ADAPTIVE_CHROMAQP_OFFSET = 0x0,
     HFI_FIXED_CHROMAQP_OFFSET = 0x1,
 };
+
 #define HFI_BITMASK_CHROMA_CB_OFFSET     0x0000ffff
 #define HFI_BITMASK_CHROMA_CR_OFFSET     0xffff0000
 #define HFI_PROP_CHROMA_QP_OFFSET                               0x0300013a
@@ -360,6 +368,7 @@ enum hfi_syncframe_request_mode {
     HFI_SYNC_FRAME_REQUEST_WITHOUT_SEQ_HDR           = 0x00000001,
     HFI_SYNC_FRAME_REQUEST_WITH_PREFIX_SEQ_HDR       = 0x00000002,
 };
+
 #define HFI_PROP_REQUEST_SYNC_FRAME                             0x03000145
 
 #define HFI_PROP_MAX_GOP_FRAMES                                 0x03000146
@@ -379,6 +388,7 @@ enum hfi_seq_header_mode {
     HFI_SEQ_HEADER_PREFIX_WITH_SYNC_FRAME = 0x00000004,
     HFI_SEQ_HEADER_METADATA               = 0x00000008,
 };
+
 #define HFI_PROP_SEQ_HEADER_MODE                                0x03000149
 
 #define HFI_PROP_METADATA_SEQ_HEADER_NAL                        0x0300014a
@@ -389,6 +399,7 @@ enum hfi_rotation {
     HFI_ROTATION_180  = 0x00000002,
     HFI_ROTATION_270  = 0x00000003,
 };
+
 #define HFI_PROP_ROTATION                                       0x0300014b
 
 enum hfi_flip {
@@ -396,6 +407,7 @@ enum hfi_flip {
     HFI_HORIZONTAL_FLIP = 0x00000001,
     HFI_VERTICAL_FLIP   = 0x00000002,
 };
+
 #define HFI_PROP_FLIP                                           0x0300014c
 
 #define HFI_PROP_SCALAR                                         0x0300014d
@@ -405,6 +417,7 @@ enum hfi_blur_types {
     HFI_BLUR_EXTERNAL = 0x00000001,
     HFI_BLUR_ADAPTIVE = 0x00000002,
 };
+
 #define HFI_PROP_BLUR_TYPES                                     0x0300014e
 
 #define HFI_BITMASK_BLUR_WIDTH        0xffff0000
@@ -438,6 +451,7 @@ enum hfi_interlace_info {
     HFI_FRAME_INTERLACE_TOPFIELD_FIRST     = 0x00000010,
     HFI_FRAME_INTERLACE_BOTTOMFIELD_FIRST  = 0x00000020,
 };
+
 #define HFI_PROP_INTERLACE_INFO                                 0x03000156
 
 #define HFI_PROP_CSC                                            0x03000157
@@ -473,6 +487,7 @@ enum hfi_picture_type {
     HFI_PICTURE_BLA = 0x00000020,
     HFI_PICTURE_NOSHOW = 0x00000040,
 };
+
 #define HFI_PROP_PICTURE_TYPE                                   0x03000162
 
 #define HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR                   0x03000163
@@ -529,6 +544,7 @@ enum hfi_nal_length_field_type {
     HFI_NAL_LENGTH_STARTCODES           = 0,
     HFI_NAL_LENGTH_SIZE_4               = 4,
 };
+
 #define HFI_PROP_NAL_LENGTH_FIELD                               0x0300017B
 
 #define HFI_PROP_TOTAL_PEAK_BITRATE                             0x0300017C
@@ -557,6 +573,7 @@ enum hfi_saliency_type {
      HFI_SALIENCY_NONE,
      HFI_SALIENCY_TYPE0,
 };
+
 #define HFI_PROP_ROI_AS_SALIENCY_INFO                           0x0300018A
 
 #define HFI_PROP_FENCE                                          0x0300018B

driver/vidc/inc/msm_vidc_debug.h

@@ -76,6 +76,7 @@ enum vidc_msg_prio_drv {
 	VIDC_PRINTK     = 0x10000000,
 	VIDC_FTRACE     = 0x20000000,
 };
+
 enum vidc_msg_prio_fw {
 	FW_LOW          = 0x00000001,
 	FW_MED          = 0x00000002,

driver/vidc/inc/resources.h

@@ -284,7 +284,7 @@ struct msm_vidc_resources_ops {
 	int (*clk_print_residency_stats)(struct msm_vidc_core *core);
 	int (*clk_reset_residency_stats)(struct msm_vidc_core *core);
 	int (*clk_update_residency_stats)(
-		struct msm_vidc_core *core,struct clock_info *cl, u64 rate);
+		struct msm_vidc_core *core, struct clock_info *cl, u64 rate);
 };
 
 const struct msm_vidc_resources_ops *get_resources_ops(void);

driver/vidc/src/msm_vdec.c

@@ -282,6 +282,7 @@ static int msm_vdec_set_bit_depth(struct msm_vidc_inst *inst,
 
 	return rc;
 }
+
 //todo: enable when needed
 /*
 static int msm_vdec_set_cabac(struct msm_vidc_inst *inst,

driver/vidc/src/venus_hfi.c

@@ -211,6 +211,7 @@ exit:
 
 	return rc;
 }
+
 static int __sys_set_power_control(struct msm_vidc_core *core, bool enable)
 {
 	int rc = 0;
@@ -294,6 +295,7 @@ skip_power_off:
 	d_vpr_e("%s: skipped\n", __func__);
 	return -EAGAIN;
 }
+
 static int __release_subcaches(struct msm_vidc_core *core)
 {
 	int rc = 0;