qcacld-3.0: Only post target interested messages to WMA

Currently cfg update notification is posting every message to WMA.
To reduce message posting load only post target interested messages
to WMA as part of cfg update notification.

Change-Id: I054d684b671d33f2b1ea73062b82af8862de0ab2
CRs-Fixed: 2090997
This commit is contained in:
Rajeev Kumar
2017-08-10 13:50:08 -07:00
committed by snandini
parent c6b5fa37c2
commit a09a5392ac
3 changed files with 37 additions and 68 deletions

View File

@@ -892,7 +892,7 @@ static void notify(tpAniSirGlobal pMac, uint16_t cfgId, uint32_t ntfMask)
if ((ntfMask & CFG_CTL_NTF_LIM) != 0)
lim_post_msg_api(pMac, &mmhMsg);
if ((ntfMask & CFG_CTL_NTF_HAL) != 0)
if ((ntfMask & CFG_CTL_NTF_TARGET) != 0)
wma_post_ctrl_msg(pMac, &mmhMsg);
/* notify ARQ */

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2012, 2014 The Linux Foundation. All rights reserved.
* Copyright (c) 2011-2012, 2014, 2017 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -53,7 +53,7 @@
#define CFG_CTL_NTF_PHY 0x00800000
#define CFG_CTL_NTF_MAC 0x01000000
#define CFG_CTL_NTF_LOG 0x02000000
#define CFG_CTL_NTF_HAL 0x04000000
#define CFG_CTL_NTF_TARGET 0x04000000
#define CFG_CTL_NTF_DPH 0x08000000
#define CFG_CTL_NTF_ARQ 0x10000000
#define CFG_CTL_NTF_SCH 0x20000000

View File

@@ -36,8 +36,7 @@
cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
{WNI_CFG_STA_ID,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RELOAD |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_RELOAD,
0, 255, 1},
{WNI_CFG_CFP_PERIOD,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_INT,
@@ -95,25 +94,23 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_EXCLUDE_UNENCRYPTED_STADEF},
{WNI_CFG_RTS_THRESHOLD,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_NTF_TARGET,
WNI_CFG_RTS_THRESHOLD_STAMIN,
WNI_CFG_RTS_THRESHOLD_STAMAX,
WNI_CFG_RTS_THRESHOLD_STADEF},
{WNI_CFG_SHORT_RETRY_LIMIT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_SHORT_RETRY_LIMIT_STAMIN,
WNI_CFG_SHORT_RETRY_LIMIT_STAMAX,
WNI_CFG_SHORT_RETRY_LIMIT_STADEF},
{WNI_CFG_LONG_RETRY_LIMIT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_LONG_RETRY_LIMIT_STAMIN,
WNI_CFG_LONG_RETRY_LIMIT_STAMAX,
WNI_CFG_LONG_RETRY_LIMIT_STADEF},
{WNI_CFG_FRAGMENTATION_THRESHOLD,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_NTF_TARGET,
WNI_CFG_FRAGMENTATION_THRESHOLD_STAMIN,
WNI_CFG_FRAGMENTATION_THRESHOLD_STAMAX,
WNI_CFG_FRAGMENTATION_THRESHOLD_STADEF},
@@ -164,32 +161,27 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STAMAX,
WNI_CFG_REASSOCIATION_FAILURE_TIMEOUT_STADEF},
{WNI_CFG_PS_ENABLE_BCN_FILTER,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_PS_ENABLE_BCN_FILTER_STAMIN,
WNI_CFG_PS_ENABLE_BCN_FILTER_STAMAX,
WNI_CFG_PS_ENABLE_BCN_FILTER_STADEF},
{WNI_CFG_PS_ENABLE_HEART_BEAT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_PS_ENABLE_HEART_BEAT_STAMIN,
WNI_CFG_PS_ENABLE_HEART_BEAT_STAMAX,
WNI_CFG_PS_ENABLE_HEART_BEAT_STADEF},
{WNI_CFG_PS_ENABLE_RSSI_MONITOR,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_PS_ENABLE_RSSI_MONITOR_STAMIN,
WNI_CFG_PS_ENABLE_RSSI_MONITOR_STAMAX,
WNI_CFG_PS_ENABLE_RSSI_MONITOR_STADEF},
{WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STAMIN,
WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STAMAX,
WNI_CFG_PS_DATA_INACTIVITY_TIMEOUT_STADEF},
{WNI_CFG_RF_SETTLING_TIME_CLK,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_RF_SETTLING_TIME_CLK_STAMIN,
WNI_CFG_RF_SETTLING_TIME_CLK_STAMAX,
WNI_CFG_RF_SETTLING_TIME_CLK_STADEF},
@@ -240,8 +232,7 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STAMAX,
WNI_CFG_DEFAULT_RATE_INDEX_24GHZ_STADEF},
{WNI_CFG_FIXED_RATE,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_FIXED_RATE_STAMIN,
WNI_CFG_FIXED_RATE_STAMAX,
WNI_CFG_FIXED_RATE_STADEF},
@@ -390,7 +381,7 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_11G_PROTECTION_ALWAYS_STADEF},
{WNI_CFG_FORCE_POLICY_PROTECTION,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_RESTART | CFG_CTL_NTF_HAL,
CFG_CTL_RESTART,
WNI_CFG_FORCE_POLICY_PROTECTION_STAMIN,
WNI_CFG_FORCE_POLICY_PROTECTION_STAMAX,
WNI_CFG_FORCE_POLICY_PROTECTION_STADEF},
@@ -511,20 +502,17 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_CHANNEL_BONDING_MODE_STAMAX,
WNI_CFG_CHANNEL_BONDING_MODE_STADEF},
{WNI_CFG_DYNAMIC_THRESHOLD_ZERO,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STAMIN,
WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STAMAX,
WNI_CFG_DYNAMIC_THRESHOLD_ZERO_STADEF},
{WNI_CFG_DYNAMIC_THRESHOLD_ONE,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_DYNAMIC_THRESHOLD_ONE_STAMIN,
WNI_CFG_DYNAMIC_THRESHOLD_ONE_STAMAX,
WNI_CFG_DYNAMIC_THRESHOLD_ONE_STADEF},
{WNI_CFG_DYNAMIC_THRESHOLD_TWO,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_DYNAMIC_THRESHOLD_TWO_STAMIN,
WNI_CFG_DYNAMIC_THRESHOLD_TWO_STAMAX,
WNI_CFG_DYNAMIC_THRESHOLD_TWO_STADEF},
@@ -838,8 +826,7 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STAMAX,
WNI_CFG_WOWLAN_MAX_SLEEP_PERIOD_STADEF},
{WNI_CFG_MAX_MEDIUM_TIME,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_MAX_MEDIUM_TIME_STAMIN,
WNI_CFG_MAX_MEDIUM_TIME_STAMAX,
WNI_CFG_MAX_MEDIUM_TIME_STADEF},
@@ -906,8 +893,7 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
4294967295u,
WNI_CFG_WPS_DEVICE_PASSWORD_ID_STADEF},
{WNI_CFG_LOW_GAIN_OVERRIDE,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_LOW_GAIN_OVERRIDE_STAMIN,
WNI_CFG_LOW_GAIN_OVERRIDE_STAMAX,
WNI_CFG_LOW_GAIN_OVERRIDE_STADEF},
@@ -917,50 +903,42 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_SINGLE_TID_RC_STAMAX,
WNI_CFG_SINGLE_TID_RC_STADEF},
{WNI_CFG_DYNAMIC_PS_POLL_VALUE,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_DYNAMIC_PS_POLL_VALUE_STAMIN,
WNI_CFG_DYNAMIC_PS_POLL_VALUE_STAMAX,
WNI_CFG_DYNAMIC_PS_POLL_VALUE_STADEF},
{WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STAMIN,
WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STAMAX,
WNI_CFG_PS_NULLDATA_AP_RESP_TIMEOUT_STADEF},
{WNI_CFG_TELE_BCN_WAKEUP_EN,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_TELE_BCN_WAKEUP_EN_STAMIN,
WNI_CFG_TELE_BCN_WAKEUP_EN_STAMAX,
WNI_CFG_TELE_BCN_WAKEUP_EN_STADEF},
{WNI_CFG_TELE_BCN_TRANS_LI,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_TELE_BCN_TRANS_LI_STAMIN,
WNI_CFG_TELE_BCN_TRANS_LI_STAMAX,
WNI_CFG_TELE_BCN_TRANS_LI_STADEF},
{WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STAMIN,
WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STAMAX,
WNI_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS_STADEF},
{WNI_CFG_TELE_BCN_MAX_LI,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_TELE_BCN_MAX_LI_STAMIN,
WNI_CFG_TELE_BCN_MAX_LI_STAMAX,
WNI_CFG_TELE_BCN_MAX_LI_STADEF},
{WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STAMIN,
WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STAMAX,
WNI_CFG_TELE_BCN_MAX_LI_IDLE_BCNS_STADEF},
{WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STAMIN,
WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STAMAX,
WNI_CFG_INFRA_STA_KEEP_ALIVE_PERIOD_STADEF},
@@ -981,20 +959,17 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_ENABLE_LTE_COEX_STAMAX,
WNI_CFG_ENABLE_LTE_COEX_STADEF},
{WNI_CFG_AP_KEEP_ALIVE_TIMEOUT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STAMIN,
WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STAMAX,
WNI_CFG_AP_KEEP_ALIVE_TIMEOUT_STADEF},
{WNI_CFG_GO_KEEP_ALIVE_TIMEOUT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STAMIN,
WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STAMAX,
WNI_CFG_GO_KEEP_ALIVE_TIMEOUT_STADEF},
{WNI_CFG_ENABLE_MC_ADDR_LIST,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_ENABLE_MC_ADDR_LIST_STAMIN,
WNI_CFG_ENABLE_MC_ADDR_LIST_STAMAX,
WNI_CFG_ENABLE_MC_ADDR_LIST_STADEF},
@@ -1014,8 +989,7 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STAMAX,
WNI_CFG_DISABLE_LDPC_WITH_TXBF_AP_STADEF},
{WNI_CFG_AP_LINK_MONITOR_TIMEOUT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STAMIN,
WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STAMAX,
WNI_CFG_AP_LINK_MONITOR_TIMEOUT_STADEF},
@@ -1056,26 +1030,22 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STAMAX,
WNI_CFG_PMF_SA_QUERY_RETRY_INTERVAL_STADEF},
{WNI_CFG_ENABLE_ADAPT_RX_DRAIN,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STAMIN,
WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STAMAX,
WNI_CFG_ENABLE_ADAPT_RX_DRAIN_STADEF},
{WNI_CFG_ANTENNA_DIVESITY,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_ANTENNA_DIVESITY_STAMIN,
WNI_CFG_ANTENNA_DIVESITY_STAMAX,
WNI_CFG_ANTENNA_DIVESITY_STADEF},
{WNI_CFG_GO_LINK_MONITOR_TIMEOUT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STAMIN,
WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STAMAX,
WNI_CFG_GO_LINK_MONITOR_TIMEOUT_STADEF},
{WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STAMIN,
WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STAMAX,
WNI_CFG_RMC_ACTION_PERIOD_FREQUENCY_STADEF},
@@ -1434,8 +1404,7 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
0, 0, 0},
{WNI_CFG_PS_WOW_DATA_INACTIVITY_TIMEOUT,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT |
CFG_CTL_NTF_HAL,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_PS_WOW_DATA_INACTIVITY_TIMEOUT_STAMIN,
WNI_CFG_PS_WOW_DATA_INACTIVITY_TIMEOUT_STAMAX,
WNI_CFG_PS_WOW_DATA_INACTIVITY_TIMEOUT_STADEF},