samsung-sm8650/android_kernel_samsung_sm8650-modules
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Zdrojový kód Úkoly Pull requesty Akce Balíčky Projekty Vydání Wiki Aktivita

video: driver: move "{" to the previous line

Procházet zdrojové kódy 
This will fix some static code checker err.

Change-Id: I664e96dd2d65f694c3f2523e1f4aeb08a40f660a
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Tento commit je obsažen v:
Ankush Mitra
2023-05-29 17:42:04 +05:30
rodič e3415ddbef
revize a04f985cda
7 změnil soubory, kde provedl 205 přidání a 405 odebrání
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212
driver/variant/iris3/inc/hfi_buffer_iris3.h
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@@ -90,8 +90,7 @@ typedef HFI_U32 HFI_BOOL;
uv_buffer_height_multiple, y_metadata_stride_multiple, \
y_metadata_buffer_height_multiple, \
uv_metadata_stride_multiple, uv_metadata_buffer_height_multiple) \
do \
{ \
do { \
HFI_U32 y_buf_size, uv_buf_size, y_meta_size, uv_meta_size; \
HFI_U32 stride, _height; \
HFI_U32 half_height = (frame_height + 1) >> 1; \
@@ -159,8 +158,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_YUV420_TP10_UBWC_CALC_BUF_SIZE(buf_size, y_stride, y_buf_height, \
uv_stride, uv_buf_height, y_md_stride, y_md_height, uv_md_stride, \
uv_md_height)\
do \
{ \
do { \
HFI_U32 y_data_size, uv_data_size, y_md_size, uv_md_size; \
HFI_YUV420_TP10_UBWC_CALC_Y_BUF_SIZE(y_data_size, y_stride,\
y_buf_height); \
@@ -191,8 +189,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_YUV420_P010_CALC_BUF_SIZE(buf_size, y_data_size, y_stride, \
y_buf_height, uv_data_size, uv_stride, uv_buf_height) \
do \
{ \
do { \
y_data_size = HFI_ALIGN(y_stride * y_buf_height, \
HFI_ALIGNMENT_4096);\
uv_data_size = HFI_ALIGN(uv_stride * uv_buf_height, \
@@ -292,8 +289,7 @@ typedef HFI_U32 HFI_BOOL;
#define MAX_TILE_COLUMNS 32
#define SIZE_VPSS_LB(Size, frame_width, frame_height, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 vpss_4tap_top_buffer_size, vpss_div2_top_buffer_size, \
vpss_4tap_left_buffer_size, vpss_div2_left_buffer_size; \
HFI_U32 opb_wr_top_line_luma_buffer_size, \
@@ -367,8 +363,7 @@ typedef HFI_U32 HFI_BOOL;
(NUM_HW_PIC_BUF * size_per_buf)
#define SIZE_H264D_BSE_CMD_BUF(_size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 _height = HFI_ALIGN(frame_height, \
BUFFER_ALIGNMENT_32_BYTES); \
_size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) *\
@@ -376,8 +371,7 @@ typedef HFI_U32 HFI_BOOL;
} while (0)
#define SIZE_H264D_VPP_CMD_BUF(_size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 _height = HFI_ALIGN(frame_height, \
BUFFER_ALIGNMENT_32_BYTES); \
_size = MIN((((_height + 15) >> 4) * 48), H264D_MAX_SLICE) * \
@@ -387,8 +381,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_COMV_H264D(coMV_size, frame_width, \
frame_height, _comv_bufcount) \
do \
{ \
do { \
HFI_U32 frame_width_in_mbs = ((frame_width + 15) >> 4); \
HFI_U32 frame_height_in_mbs = ((frame_height + 15) >> 4); \
HFI_U32 col_mv_aligned_width = (frame_width_in_mbs << 7); \
@@ -419,8 +412,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_NON_COMV_H264D(_size, frame_width, frame_height, \
num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 _size_bse, _size_vpp; \
SIZE_H264D_BSE_CMD_BUF(_size_bse, frame_width, frame_height); \
SIZE_H264D_VPP_CMD_BUF(_size_vpp, frame_width, frame_height); \
@@ -433,8 +425,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_LINE_H264D(_size, frame_width, frame_height, \
is_opb, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 vpss_lb_size = 0; \
_size = HFI_ALIGN(SIZE_H264D_LB_FE_TOP_DATA(frame_width, \
frame_height), VENUS_DMA_ALIGNMENT) + \
@@ -470,8 +461,7 @@ typedef HFI_U32 HFI_BOOL;
#define SIZE_H264D_HW_BIN_BUFFER(_size, frame_width, frame_height, \
delay, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \
size_yuv = ((frame_width * frame_height) <= \
BIN_BUFFER_THRESHOLD) ?\
@@ -492,8 +482,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_BIN_H264D(_size, frame_width, frame_height, is_interlaced, \
delay, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \
BUFFER_ALIGNMENT_16_BYTES);\
HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \
@@ -570,8 +559,7 @@ typedef HFI_U32 HFI_BOOL;
SIZE_H264D_QP(frame_width, frame_height)
#define SIZE_H265D_BSE_CMD_BUF(_size, frame_width, frame_height)\
do \
{ \
do { \
_size = HFI_ALIGN(((HFI_ALIGN(frame_width, \
LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS) * \
(HFI_ALIGN(frame_height, LCU_MAX_SIZE_PELS) /\
@@ -581,8 +569,7 @@ typedef HFI_U32 HFI_BOOL;
} while (0)
#define SIZE_H265D_VPP_CMD_BUF(_size, frame_width, frame_height) \
do \
{ \
do { \
_size = HFI_ALIGN(((HFI_ALIGN(frame_width, LCU_MAX_SIZE_PELS) /\
LCU_MIN_SIZE_PELS) * (HFI_ALIGN(frame_height, \
LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS)) * \
@@ -598,8 +585,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_COMV_H265D(_size, frame_width, frame_height, \
_comv_bufcount) \
do \
{ \
do { \
_size = HFI_ALIGN(((((frame_width + 15) >> 4) * \
((frame_height + 15) >> 4)) << 8), \
BUFFER_ALIGNMENT_512_BYTES); \
@@ -611,8 +597,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_NON_COMV_H265D(_size, frame_width, frame_height, \
num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 _size_bse, _size_vpp; \
SIZE_H265D_BSE_CMD_BUF(_size_bse, frame_width, \
frame_height); \
@@ -635,8 +620,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_LINE_H265D(_size, frame_width, frame_height, \
is_opb, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 vpss_lb_size = 0; \
_size = HFI_ALIGN(SIZE_H265D_LB_FE_TOP_DATA(frame_width, \
frame_height), VENUS_DMA_ALIGNMENT) + \
@@ -673,8 +657,7 @@ typedef HFI_U32 HFI_BOOL;
#define SIZE_H265D_HW_BIN_BUFFER(_size, frame_width, frame_height, \
delay, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \
size_yuv = ((frame_width * frame_height) <= \
BIN_BUFFER_THRESHOLD) ? \
@@ -696,8 +679,7 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_BIN_H265D(_size, frame_width, frame_height, \
is_interlaced, delay, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 n_aligned_w = HFI_ALIGN(frame_width, \
BUFFER_ALIGNMENT_16_BYTES); \
HFI_U32 n_aligned_h = HFI_ALIGN(frame_height, \
@@ -766,8 +748,7 @@ typedef HFI_U32 HFI_BOOL;
SIZE_H264D_QP(frame_width, frame_height)
#define HFI_IRIS3_VP9D_LB_SIZE(_size, frame_width, frame_height, num_vpp_pipes)\
do \
{ \
do { \
_size = HFI_ALIGN(SIZE_VPXD_LB_FE_LEFT_CTRL(frame_width, \
frame_height),VENUS_DMA_ALIGNMENT) * num_vpp_pipes + \
HFI_ALIGN(SIZE_VPXD_LB_SE_LEFT_CTRL(frame_width, frame_height),\
@@ -790,14 +771,12 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_LINE_VP9D(_size, frame_width, frame_height, \
_yuv_bufcount_min, is_opb, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 _lb_size = 0; \
HFI_U32 vpss_lb_size = 0; \
HFI_IRIS3_VP9D_LB_SIZE(_lb_size, frame_width, frame_height,\
num_vpp_pipes); \
if (is_opb) \
{ \
if (is_opb) { \
SIZE_VPSS_LB(vpss_lb_size, frame_width, frame_height, \
num_vpp_pipes); \
} \
@@ -810,13 +789,11 @@ typedef HFI_U32 HFI_BOOL;
#define HFI_BUFFER_BIN_VP9D(_size, frame_width, frame_height, \
is_interlaced, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 _size_yuv = HFI_ALIGN(frame_width, \
BUFFER_ALIGNMENT_16_BYTES) *\
HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES) * 3 / 2; \
if (!is_interlaced) \
{ \
if (!is_interlaced) { \
_size = HFI_ALIGN(((MAX(_size_yuv, \
((BIN_BUFFER_THRESHOLD * 3) >> 1)) * \
VPX_DECODER_FRAME_BIN_HDR_BUDGET_RATIO * \
@@ -828,10 +805,8 @@ typedef HFI_U32 HFI_BOOL;
VENUS_DMA_ALIGNMENT); \
_size = _size * num_vpp_pipes; \
} \
else \
{ \
else \
_size = 0; \
} \
} while (0)
#define VP9_NUM_FRAME_INFO_BUF 32
@@ -894,7 +869,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_COMV_AV1D(_size, frame_width, frame_height, \
_comv_bufcount) \
do { \
do { \ \
_size = 2 * HFI_ALIGN(MAX(((frame_width + 63) / 64) * \
((frame_height + 63) / 64) * 512, \
((frame_width + 127) / 128) * \
@@ -964,24 +939,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
SIZE_H264D_QP(frame_width, frame_height)
#define SIZE_AV1D_LB_OPB_WR1_NV12_UBWC(_size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 y_width, y_width_a = 128; \
HFI_NV12_IL_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \
_size = (256 * ((y_width + 31) / 32 + (AV1D_MAX_TILE_COLS - 1))); \
} while (0)
#define SIZE_AV1D_LB_OPB_WR1_TP10_UBWC(_size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 y_width, y_width_a = 256; \
HFI_YUV420_TP10_CALC_Y_STRIDE(y_width, frame_width, y_width_a); \
_size = (256 * ((y_width + 47) / 48 + (AV1D_MAX_TILE_COLS - 1))); \
} while (0)
#define SIZE_AV1D_IBC_NV12_UBWC(_size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 y_width_a = 128, y_height_a = 32; \
HFI_U32 uv_width_a = 128, uv_height_a = 32; \
HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \
@@ -1017,8 +989,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define SIZE_AV1D_IBC_TP10_UBWC(_size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 y_width_a = 256, y_height_a = 16, \
uv_width_a = 256, uv_height_a = 16; \
HFI_U32 yBufSize, uvBufSize, y_width, y_height, uv_width, uv_height; \
@@ -1056,8 +1027,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_LINE_AV1D(_size, frame_width, frame_height, isOPB, \
num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 vpssLBSize, opbwr1BufSize, opbwr8, opbwr10; \
_size = HFI_ALIGN(SIZE_AV1D_LB_FE_TOP_DATA(frame_width, frame_height), \
VENUS_DMA_ALIGNMENT) + \
@@ -1092,7 +1062,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define HFI_BUFFER_IBC_AV1D(_size, frame_width, frame_height) \
do { \
do { \ \
HFI_U32 ibc8, ibc10; \
SIZE_AV1D_IBC_NV12_UBWC(ibc8, frame_width, frame_height); \
SIZE_AV1D_IBC_TP10_UBWC(ibc10, frame_width, frame_height); \
@@ -1105,8 +1075,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
* but limit buffer size for high resolution */
#define SIZE_AV1D_HW_BIN_BUFFER(_size, frame_width, frame_height, delay, \
num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 size_yuv, size_bin_hdr, size_bin_res; \
size_yuv = ((frame_width * frame_height) <= BIN_BUFFER_THRESHOLD) ? \
((BIN_BUFFER_THRESHOLD * 3) >> 1) : \
@@ -1126,8 +1095,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_BIN_AV1D(_size, frame_width, frame_height, isInterlaced, \
delay, num_vpp_pipes) \
do \
{ \
do { \
HFI_U32 nAlignedW = HFI_ALIGN(frame_width, BUFFER_ALIGNMENT_16_BYTES); \
HFI_U32 nAlignedH = HFI_ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES); \
if (!isInterlaced) \
@@ -1159,8 +1127,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
AV1D_SIZE_BSE_COL_MV_128x128))
#define HFI_BUFFER_PERSIST_AV1D(_size, max_width, max_height, total_ref_count) \
do \
{ \
do { \
HFI_U32 comv_size; \
HFI_BUFFER_COMV_AV1D(comv_size, max_width, max_height, total_ref_count); \
_size = \
@@ -1175,8 +1142,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_BITSTREAM_ENC(size, frame_width, frame_height, \
rc_type, is_ten_bit) \
do \
{ \
do { \
HFI_U32 aligned_width, aligned_height, bitstream_size, yuv_size; \
aligned_width = HFI_ALIGN(frame_width, 32); \
aligned_height = HFI_ALIGN(frame_height, 32); \
@@ -1210,8 +1176,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \
frame_width_coded, codec_standard) \
do \
{ \
do { \
HFI_U32 without_tile_enc_width; \
HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \
without_tile_enc_width = min_tile_size + fixed_tile_width; \
@@ -1237,8 +1202,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \
codec_standard, multi_slice_max_mb_count) \
do \
{ \
do { \
HFI_U32 tile_size, tile_count, last_tile_size, \
slice_count_per_tile, slice_count_in_last_tile; \
HFI_U32 mbs_in_one_tile, mbs_in_last_tile; \
@@ -1267,8 +1231,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\
do \
{ \
do { \
HFI_U32 width_in_lcus = 0, height_in_lcus = 0, n_shift = 0; \
while (lcu_size && !(lcu_size & 0x1)) \
{ \
@@ -1283,8 +1246,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_INPUT_METADATA_ENC(size, frame_width, frame_height, \
is_roi_enabled, lcu_size) \
do \
{ \
do { \
HFI_U32 roi_size = 0; \
if (is_roi_enabled) \
{ \
@@ -1297,23 +1259,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_INPUT_METADATA_H264E(size_metadata, frame_width, \
frame_height, is_roi_enabled) \
do \
{ \
do { \
HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \
frame_height, is_roi_enabled, 16); \
}while (0)
#define HFI_BUFFER_INPUT_METADATA_H265E(size_metadata, frame_width, \
frame_height, is_roi_enabled) \
do \
{ \
do { \
HFI_BUFFER_INPUT_METADATA_ENC(size_metadata, frame_width, \
frame_height, is_roi_enabled, 32); \
} while (0)
#define HFI_BUFFER_ARP_ENC(size) \
do \
{ \
do { \
size = 204800; \
} while (0)
@@ -1333,8 +1292,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_IRIS3_ENC_RECON_BUF_COUNT(num_recon, n_bframe, ltr_count, \
_total_hp_layers, _total_hb_layers, hybrid_hp, codec_standard) \
do \
{ \
do { \
HFI_U32 num_ref = 1; \
if (n_bframe) \
num_ref = 2; \
@@ -1364,8 +1322,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \
work_mode, lcu_size, profile) \
do \
{ \
do { \
HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \
HFI_U32 bitstream_size_eval = 0; \
size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \
@@ -1411,8 +1368,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \
frame_width, frame_height, lcu_size) \
do \
{ \
do { \
HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \
_padded_bin_sz = 0; \
HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \
@@ -1448,8 +1404,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, lcu_size, \
work_mode, num_vpp_pipes, profile) \
do \
{ \
do { \
HFI_U32 bitstream_size = 0, total_bitbin_buffers = 0, \
size_single_pipe = 0, bitbin_size = 0; \
SIZE_BIN_BITSTREAM_ENC(bitstream_size, rc_type, frame_width, \
@@ -1483,16 +1438,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \
work_mode, num_vpp_pipes, profile) \
do \
{ \
do { \
HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 16, \
work_mode, num_vpp_pipes, profile); \
} while (0)
#define HFI_BUFFER_BIN_H265E(_size, rc_type, frame_width, frame_height, \
work_mode, num_vpp_pipes, profile) \
do \
{ \
do { \
HFI_BUFFER_BIN_ENC(_size, rc_type, frame_width, frame_height, 32,\
work_mode, num_vpp_pipes, profile); \
} while (0)
@@ -1505,8 +1458,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
HFI_ALIGN(frame_width_coded, VENUS_DMA_ALIGNMENT)
#define SIZE_LINEBUFF_DATA(_size, is_ten_bit, frame_width_coded) \
do \
{ \
do { \
_size = is_ten_bit ? (((((10 * (frame_width_coded) +\
1024) + (VENUS_DMA_ALIGNMENT - 1)) & \
(~(VENUS_DMA_ALIGNMENT - 1))) * 1) + \
@@ -1522,8 +1474,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define SIZE_LEFT_LINEBUFF_CTRL(_size, standard, frame_height_coded, \
num_vpp_pipes_enc) \
do \
{ \
do { \
_size = (standard == HFI_CODEC_ENCODE_HEVC) ? \
(((frame_height_coded) + \
(BUF_SIZE_ALIGN_32)) / BUF_SIZE_ALIGN_32 * 4 * 16) : \
@@ -1539,8 +1490,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define SIZE_LEFT_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_height_coded, \
num_vpp_pipes_enc) \
do \
{ \
do { \
_size = (((is_ten_bit + 1) * 2 * (frame_height_coded) + \
VENUS_DMA_ALIGNMENT) + \
(VENUS_DMA_ALIGNMENT << (num_vpp_pipes_enc - 1)) - 1) & \
@@ -1548,8 +1498,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define SIZE_TOP_LINEBUFF_CTRL_FE(_size, frame_width_coded, standard) \
do \
{ \
do { \
_size = (standard == HFI_CODEC_ENCODE_HEVC) ? (64 * \
((frame_width_coded) >> 5)) : (VENUS_DMA_ALIGNMENT + 16 * \
((frame_width_coded) >> 4)); \
@@ -1564,8 +1513,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define SIZE_LEFT_LINEBUFF_METADATA_RECON_Y(_size, frame_height_coded, \
is_ten_bit, num_vpp_pipes_enc) \
do \
{ \
do { \
_size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \
(8 * (is_ten_bit ? 4 : 8))))); \
_size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \
@@ -1574,8 +1522,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define SIZE_LEFT_LINEBUFF_METADATA_RECON_UV(_size, frame_height_coded, \
is_ten_bit, num_vpp_pipes_enc) \
do \
{ \
do { \
_size = ((VENUS_DMA_ALIGNMENT + 64 * ((frame_height_coded) / \
(4 * (is_ten_bit ? 4 : 8))))); \
_size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \
@@ -1583,8 +1530,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define SIZE_LINEBUFF_RECON_PIX(_size, is_ten_bit, frame_width_coded) \
do \
{ \
do { \
_size = ((is_ten_bit ? 3 : 2) * (frame_width_coded)); \
_size = HFI_ALIGN(_size, VENUS_DMA_ALIGNMENT); \
} while (0)
@@ -1594,8 +1540,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define SIZE_FRAME_RC_BUF_SIZE(_size, standard, frame_height_coded, \
num_vpp_pipes_enc) \
do \
{ \
do { \
_size = (standard == HFI_CODEC_ENCODE_HEVC) ? (256 + 16 * \
(14 + ((((frame_height_coded) >> 5) + 7) >> 3))) : \
(256 + 16 * (14 + ((((frame_height_coded) >> 4) + 7) >> 3))); \
@@ -1635,8 +1580,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, is_ten_bit, \
num_vpp_pipes_enc, lcu_size, standard) \
do \
{ \
do { \
HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \
frame_width_coded = 0, frame_height_coded = 0; \
HFI_U32 line_buff_data_size = 0, left_line_buff_ctrl_size = 0, \
@@ -1683,24 +1627,21 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_LINE_H264E(_size, frame_width, frame_height, is_ten_bit, \
num_vpp_pipes) \
do \
{ \
do { \
HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, 0, \
num_vpp_pipes, 16, HFI_CODEC_ENCODE_AVC); \
} while (0)
#define HFI_BUFFER_LINE_H265E(_size, frame_width, frame_height, is_ten_bit, \
num_vpp_pipes) \
do \
{ \
do { \
HFI_BUFFER_LINE_ENC(_size, frame_width, frame_height, \
is_ten_bit, num_vpp_pipes, 32, HFI_CODEC_ENCODE_HEVC); \
} while (0)
#define HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, lcu_size, \
num_recon, standard) \
do \
{ \
do { \
HFI_U32 size_colloc_mv = 0, size_colloc_rc = 0; \
HFI_U32 mb_width = ((frame_width) + 15) >> 4; \
HFI_U32 mb_height = ((frame_height) + 15) >> 4; \
@@ -1722,23 +1663,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define HFI_BUFFER_COMV_H264E(_size, frame_width, frame_height, num_recon) \
do \
{ \
do { \
HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 16, \
num_recon, HFI_CODEC_ENCODE_AVC); \
} while (0)
#define HFI_BUFFER_COMV_H265E(_size, frame_width, frame_height, num_recon) \
do \
{ \
do { \
HFI_BUFFER_COMV_ENC(_size, frame_width, frame_height, 32,\
num_recon, HFI_CODEC_ENCODE_HEVC); \
} while (0)
#define HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \
num_vpp_pipes_enc, lcu_size, standard) \
do \
{ \
do { \
HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \
frame_width_coded = 0, frame_height_coded = 0, \
num_lcu_in_frame = 0, num_lcumb = 0; \
@@ -1766,23 +1704,20 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
#define HFI_BUFFER_NON_COMV_H264E(_size, frame_width, frame_height, \
num_vpp_pipes_enc) \
do \
{ \
do { \
HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \
num_vpp_pipes_enc, 16, HFI_CODEC_ENCODE_AVC); \
} while (0)
#define HFI_BUFFER_NON_COMV_H265E(_size, frame_width, frame_height, \
num_vpp_pipes_enc) \
do \
{ \
do { \
HFI_BUFFER_NON_COMV_ENC(_size, frame_width, frame_height, \
num_vpp_pipes_enc, 32, HFI_CODEC_ENCODE_HEVC); \
} while (0)
#define SIZE_ENC_REF_BUFFER(size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 u_buffer_width = 0, u_buffer_height = 0, \
u_chroma_buffer_height = 0; \
u_buffer_height = HFI_ALIGN(frame_height, \
@@ -1797,8 +1732,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define SIZE_ENC_TEN_BIT_REF_BUFFER(size, frame_width, frame_height) \
do \
{ \
do { \
HFI_U32 ref_buf_height = 0, ref_luma_stride_in_bytes = 0, \
u_ref_stride = 0, luma_size = 0, ref_chrm_height_in_bytes = 0, \
chroma_size = 0, ref_buf_size = 0; \
@@ -1824,8 +1758,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit) \
do \
{ \
do { \
HFI_U32 metadata_stride, metadata_buf_height, meta_size_y, \
meta_size_c; \
HFI_U32 ten_bit_ref_buf_size = 0, ref_buf_size = 0; \
@@ -1865,20 +1798,17 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
} while (0)
#define HFI_BUFFER_DPB_H264E(_size, frame_width, frame_height) \
do \
{ \
do { \
HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, 0); \
} while (0)
#define HFI_BUFFER_DPB_H265E(_size, frame_width, frame_height, is_ten_bit) \
do \
{ \
do { \
HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \
} while (0)
#define HFI_BUFFER_VPSS_ENC(vpss_size, dswidth, dsheight, ds_enable, blur, is_ten_bit) \
do \
{ \
do { \
vpss_size = 0; \
if (ds_enable || blur) \
{ \